When using stm32f407 to communicate with the computer host via serial port, the serial port assistant prints garbled characters. Mainly check from the following aspects:
- Check whether the transmission protocol settings are consistent (baud rate, data bits, stop bits, parity bits)
- Check whether the MCU external crystal oscillator frequency is consistent with the library function setting
Finally, it was found that the external crystal oscillator frequency was inconsistent with the library function.
1. Clock analysis
1. Understand the clock source
What we want to check is whether the clock source of the APB2 bus is set normally, because the serial port USART1 we are currently using is connected to the APB2 bus (high-speed bus). As shown in the figure below, there are three clock sources:
- HSI: High-speed internal clock, RC oscillator, frequency 16MHz
- HSE: high-speed external clock, connected to an external clock source, frequency range is 4MHz~26MHz
- PLL: phase-locked loop frequency multiplier output, its clock input source can be selected as HSI/M, HSE/M (essentially still controlled by HSE or HSI)
As a result, the selected clock source is PLLCLK . (If you want to know more, you can refer to the last part)
2. Calculate the system clock
Now that we know that PLLCLK is selected as the clock source, we can calculate the value of the system clock along this route. The peripheral clock frequency of punctual atomic stm32f407 HSE = 8 M
① Enter HSE
② After dividing by M, the result is HSE / M = 8 / M
③ ④ ⑤ ⑥ After N multiplication, the output of the VCO is (HSE / M ) * N
⑦ Divide P again to get SYSCLK = (HSE / M ) * N / P
2. Solve the problem of inconsistency between the external crystal oscillator frequency and the library function
As can be seen from the above , the selected system clock frequency SYSCLK = (HSE / M ) * N / P, the configuration file expected SYSCLK = 144MHz, and the remaining parameters are also specified
In fact, the HSE depends on the specific conditions of the development board. The HSE of stm32f4 is 8 MHz, but the frequency configured in the configuration file is 25 M. In order not to affect the original SYSCLK, we need to modify the HSE and PLL_M.
- HSE = 8 M = 8000000
- PLL_M = (HSE / SYSCLK ) * N / P = 8
1. Modify HSE
The embodiment of HSE in the program is the macro definition HSE_VALUE, which is defined in the stm32f4xx.h file
There are two modification methods here. You can choose any one.
2. Modify PLL_M
The frequency division number M is reflected in the program as the macro definition PLL_M, which is defined in the system_stm32f4xx.c file
3. Why can the clock source be determined to be PLLCLK instead of HSE?
stm32 will call the SystemInit function when it starts. This function includes the clock source for initializing peripherals. This function is defined in system_stm32f4xx.c. We directly find the SetSysClock function, which is the operation of clearing the control register bits.
We enter the SetSysClock function, first enable the HSE and wait for the clock to be ready. The HSE crystal oscillator is unstable when first powered on and needs to wait for 6 crystal oscillator clock cycles.
The PLL is enabled and waits for the clock to be ready. The PLL is locked at first, and you need to wait for the PLL to be unlocked.
Once everything is ready, set the PLL as the system clock.
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