[STM32F4] 1. Clock tree of STM32F4

Note: This blog post is just another repetition of the Punctual Atomic Course. It summarizes punctual tutorials and writes some insights, not plagiarism in the name of originality.

Compared with 51, STM32F4 has a complicated clock tree. This blog post aims to record the relationship between each clock and clarify the clock tree of STM32F4.

1. Introduction to the clock

1. What is a clock?

**Clock is the basis for the operation of the single-chip microcomputer, and the clock signal drives the various parts of the single-chip microcomputer to execute corresponding instructions. **The clock system is the pulse of the CPU, which determines the cpu rate. Like the human heartbeat, only with the heartbeat can people do other things, and the single-chip microcomputer can run and execute instructions before it can do other processing (lighting up). , Serial port, ADC), the importance of the clock is self-evident.

Reference: CSDN blogger [Z Xiaoxuan]'s blog [STM32] Detailed system clock RCC (super detailed, super comprehensive)

2. Why does STM32 have multiple clock sources?

STM32 itself is very complicated, there are many peripherals, but we will only use a limited number of peripherals when we actually use them. Any peripheral needs a clock to start, but not all peripherals need the system clock so high Frequency, in order to be compatible with devices of different speeds, some are high-speed and some are low-speed. If high-speed clocks are used, it will inevitably cause waste. Also, the same circuit, the faster the clock, the faster the power consumption, and the weaker the anti-electromagnetic interference ability. Complex MCUs use multiple clock sources to solve these problems. So there is the clock system and clock tree of STM32.

2. Brief introduction of clock tree diagram

First, the schematic diagram of the clock tree is as follows: It
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looks like a huge clock tree, we divide it into blocks ( clock + phase-locked loop + peripherals ), the situation will become simple: in the
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above figure, clock ①②③④ + phase-locked loop They are all parts that can generate clocks, and there are a bunch of devices that can generate clocks, such as ETH_MI_TX_CLK_MII, which are not framed in the lower left corner, but they are not important and will not be considered for the time being.

Except for the clock + phase-locked loop , the others are basically peripherals , that is, external devices that receive and use the clock. If there is no clock supply, all devices on the single-chip microcomputer will not work.

In addition to clocks, phase-locked loops, and peripherals , there are two more important devices:


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Frequency divider: shaped like this box with **/2 to 31**, it is a frequency divider, which means that it can convert a clock signal with a frequency of f into the interval from f/2 to f/31 A clock signal of any frequency within.

② Selector:
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shaped like a trapezoid in the figure above, is a choice, it is from the right four select inputs a , and outputs the left.

3. Clock①②③④+Introduction of phase-locked loop

1. Introduction of clock ①②③④

Clock①: LSI, Low Speed ​​(Speed) internal (Inter) clock, generated by RC oscillator, frequency is about 32kHZ, frequency is unstable, used by independent watchdog and automatic wake-up unit.

Clock ②: LSE, low speed (Speed) external (Extern) clock, generated by a 32.768kHZ quartz crystal, the frequency is relatively stable, mainly the RTC (Real_Time_Clock) clock source.

Clock ③: HSE, high-speed external clock, can be generated by crystal oscillator or external clock source, frequency range is 4MHz~26MHz, can be directly used as system clock (SYSCLK in the figure) or PLL (phase locked loop) input.

Clock ④: HSI, high-speed internal clock, generated by an RC oscillator, with a frequency of 16MHZ, which can be used directly as a system clock or as a PLL (Phase Locked Loop) input.

2. Introduction to Phase Locked Loop (PLL)

As mentioned in 2.1, both HSE and HSI can be used as the input of the phase-locked loop. What does the phase-locked loop do after receiving this clock input?

Generally speaking, the phase-locked loop is to accept a clock input, and then through operations such as frequency division, frequency multiplication, etc., generate a clock signal with a new frequency, and then output it.

Let's analyze a phase-locked loop:
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as shown in the figure above, the selector on the far right selects a clock signal f , and then f passes through the divider to the left to obtain f/M , which is the input of the phase-locked loop, here Denoted as C = f / M ;

After C in the PLL voltage controlled oscillator (VCO) or a frequency multiplier (xN) , to obtain a clock signal having a new frequency, as an example we here through a frequency multiplier to obtain C X N , then through the right Any one of the three frequency dividers (/P, /Q, /R) (in fact, this phase-locked loop does not set the output at /R, so the only effective frequency dividers are /P and /Q) , to pass through here / P, for example, to obtain an output ① C X N / P .

In summary, the frequency calculation formula of the output clock signal obtained after the clock signal with frequency f passes through the frequency divider and the phase-locked loop is:

outF = (f / M) x N / P

3. Why does STM32F4 have two phase-locked loops?

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The phase-locked loop ① at the top is called the main PLL , and the output clock signal can be used for various peripherals.
The phase-locked loop ② at the bottom is called a dedicated PLL , which is designed to provide a stable and accurate clock signal for I2S (I2S has higher requirements for clock signals).

Fourth, how to configure the clock in the program

1. RCC register

RCC (Reset and Clock Control) register, Chinese name Reset and clock control register , the name implies, it not only controls the clock source of energy , but also to control the peripheral clock enable , while on the peripheral reset .

Configuring the clock in the program is actually configuring the RCC register .

2. How to configure the RCC register

In the STM32F4 standard firmware library, RCC related functions control the selection of the clock source and clock enable, etc., and these functions are declared and defined in the RCC related firmware library files stm32f4xx_rcc.h and stm32f4xx_rcc.c .

These functions can be roughly classified into three categories (there is a fourth category below, but not commonly used):
①One is the peripheral clock enable function;
②The other is the clock source and frequency division factor configuration function, that is, the configuration selector and Frequency divider ;
③There is another type of peripheral reset function;
④Finally, there are a few functions for obtaining clock source configuration.

Explanation:

  • If you want to use a peripheral, you must enable the peripheral clock, which corresponds to the above ;

  • The peripheral clock is enabled, it must be given clock signal , which would enable clock sources , and may need to enable the selector and frequency divider , which corresponds to the above-mentioned ;

  • If there is a problem with the peripheral, reset it, which corresponds to the above ;

  • If you want to know the current frequency of a certain clock source, you must know its current configuration, which corresponds to the above .

2.1 How to enable peripheral clock?

STM32F4 has a total of five buses (AHB1, AHB2, AHB3, APB1, APB2) , and each bus is equipped with a certain number of peripherals.

To enable the peripheral clock, you must first know which bus the peripheral is connected to. For example, all pins of GPIOA are hung under AHB1. Then we need to enable the peripheral clock connected to GPIOA. Call the following function:

RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA,ENABLE);//使能 GPIOA 时钟

The RCC firmware library of STM32F4 provides a total of five peripheral clock enable functions, as shown below, corresponding to five buses:

void RCC_AHB1PeriphClockCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
void RCC_AHB2PeriphClockCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
void RCC_AHB3PeriphClockCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);

After finding out which bus the peripheral is under, call the corresponding function.

2.3 How to enable the clock source?

There are six clock source enable functions :

void RCC_HSICmd(FunctionalState NewState);
void RCC_LSICmd(FunctionalState NewState);
void RCC_PLLCmd(FunctionalState NewState);
void RCC_PLLI2SCmd(FunctionalState NewState);
void RCC_PLLSAICmd(FunctionalState NewState);
void RCC_RTCCLKCmd(FunctionalState NewState);

For example, if we want to enable PLL, we must call as follows:

RCC_PLLCmd(ENABLE);

2.4 How to choose the clock source and frequency division factor?

2.5 How to reset peripherals?

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Origin blog.csdn.net/qq_39642978/article/details/111875838