Memory classification: main memory, auxiliary memory.
Three important performance indicators of memory: speed, capacity, and price per bit.
| Memory | speed | capacity | price |
|---|---|---|---|
| register | fast | small | high |
| Cache | |||
| Main memory | |||
| Disk | |||
| Tape | slow | Big | low |
The hierarchical structure of the storage system is mainly reflected in the two storage levels of cache-main storage and main storage-auxiliary storage.
The cache-main memory level mainly solves the problem of the speed mismatch between CPU and main memory.
Since the speed of the cache is higher than that of the main memory, as long as the information that the CPU needs in the near future is transferred to the cache, the CPU can directly obtain the information from the cache, thereby increasing the access speed.
However, due to the small capacity of the cache, it is necessary to constantly transfer the contents of the main memory into the cache so that the original information in the cache is replaced.
The main storage-auxiliary storage layer mainly solves the capacity problem of the storage system.
The main technical indicators of main memory are storage capacity and storage speed.
Storage capacity refers to the total number of bits of binary code that can be stored in the main memory.
Storage speed is expressed by access time and access cycle.
Memory bandwidth is closely related to the access cycle, and represents the amount of information accessed by the memory per unit time.
The number of bits of the address line and the data line together reflect the capacity of the memory chip.
Random access memory is divided into static RAM and dynamic RAM according to different principles of storing information.
Refreshing of dynamic RAM The refreshing process is essentially to read the original stored information first, and then the original information is formed by the refresh amplifier and rewritten into the regeneration process.
There are usually three ways to refresh: centralized refresh, distributed refresh, and asynchronous refresh.
Expansion of memory capacity: A number of memory chips must be connected together to form a memory of sufficient capacity, which is called memory capacity expansion, usually with bit expansion and word expansion.
Bit expansion refers to increasing the storage word length.
Word expansion refers to increasing the number of memory words.
Word and bit expansion means not only increasing the number of storage words, but also increasing the length of storage words.
Memory and CPU connection
- Address line connection
- Data line connection
- Read and write command line connection
- Chip select line connection
- Reasonable choice of memory chip
The appearance of Cache allows CPU to exchange information with high-speed cache instead of directly accessing main memory.
Cache capacity and block length are important factors that affect cache efficiency. The hit rate is usually used to measure cache efficiency.
The hit rate refers to the ratio of information to be accessed by the CPU in the cache.
In order to improve access efficiency, the closer the hit rate h is to 1, the better.
The mapping from the main memory address to the cache address becomes an address mapping.
There are many address mapping methods, including direct mapping (fixed mapping relationship), fully associative mapping (flexible mapping relationship), and group associative mapping (a compromise between the above two mappings)
When a new main memory block needs to be transferred to the cache and its available space is filled up, the cache data needs to be replaced, which creates a replacement strategy (algorithm) problem.
In the cache of group-associated and fully-associated mapping, the main memory block can be written to several locations in the cache. There is a problem of choosing which cache block to replace, which is the so-called replacement algorithm problem.
Commonly used replacement algorithms are the first in first out (FIFO) algorithm and the least recently used (LRU) algorithm.