1. UART hardware introduction
I have been using serial ports in my work, and I am already familiar with the serial port protocol, but in order to write a blog, I will briefly introduce the hardware principle of UART.
1.1 UART principle description
Universal Asynchronous Receiver Transmitter is referred to as UART, or "Universal Asynchronous Receiver Transmitter", which is used to transmit serial data: When sending data, the CPU writes parallel data into the UART, and the UART sends out serially on a wire according to a certain format; When data is being sent, the UART detects the signal on another wire, puts the serial data in the buffer, and the CPU can read the UART to obtain these data. The data is transmitted between the UARTs in full duplex mode, the most streamlined connection method There are only 3 wires. TXD is used to send data, RXD is used to receive data, and GND is the ground wire. The connection method is shown in the figure below:
UART uses standard TTL/CMOS logic levels (0-5V, 0-3.3V, 0-2.5V) to represent data, high level represents 1, low level represents 0, in order to enhance the anti-interference ability of data, improve Transmission speed, usually convert TTL/CMOS logic level to RS-232 logic level, 3-12V means 0, -3~-12V means 1.
The TXD and RXD data lines transmit data in bits as the smallest unit. The frame is composed of several indivisible bits with complete meaning. It includes start bit, data bit, check bit and stop bit. Before sending data, UARTs must agree Good data transmission rate, data transmission format (i.e. how many data bits, whether to use parity bits, whether it is odd or even parity, and how many stop bits are there).
The data transmission process is as follows:
(1) The data line is at high level at ordinary times, indicating an idle state.
(2) When sending data, the UART changes the TXD data line to low level and maintains 1 bit time to indicate the start signal. After the receiver detects the start signal, it waits for 1.5 bits (1.5 bits because First, the signal has 1 bit time, and then the data bit is detected in the middle of the data bit, so it is 0.5 bit time), and then it starts to detect the state of the data line bit by bit to get the transmitted data.
(3) There can be 5, 6, 7 or 8 bits of data in a UART frame. The sender changes the state of the data line bit by bit to send them out, and the lowest bit is sent first.
(4) If the check function is used, after the UART sends the data bit, it also sends a check bit. There are two check methods: odd check, even check, ---- data bit together with check bit Among them, the data of '1' is equal to odd or even.
(5) Finally, the stop bit is sent, and the data line is restored to the "idle state". The length of the stop bit can be 1 bit, 1.5 bits or 2 bits.
The following figure shows the corresponding waveforms of TTL/CMOS logic level and RS232 logic level when UART uses the format of 7 data bits, even parity, and 2 stop bits to transmit the character'A'.
1.2 Features of S3C240 UART
There are 3 independent UART channels in S3C2440, each channel can work in terminal mode or DMA mode, that is, UART can issue interrupt or DMA request to transfer data between UART and CPU. UART is composed of baud rate generator and transmitter. , Receiver and control logic.
When using the system clock, the UART baud rate of S3C2440 can reach 115.2Kbit/s. If you use the external clock provided by the UEXTCLK pin, you can reach a higher baud rate. The FIFO depth of the S3C2440 UART is 64. When sending data , The CPU first writes the data into the transmit FIFO, and then the UART will automatically copy the data in the FIFO to the "Transmit Shift", and the transmit shifter sends the data one by one to the TXDn data line When receiving data, the receiving shifter receives the data on the Rxdn data line bit by bit, and then copies it to the receiving FIFO, and the CPU can read the data from it.
The structure of S3C2440 UART is shown in the figure below:
