Next (1), we drew a simple schematic diagram of an inverter before. Now let’s draw a simple layout of the inverter...Of course we don’t consider the details, such as the minimum size of the parameters...because I’m a cute new one, I’m also exploring, draw a game first...
Simple inverter layout design
The same as before, the Cell View
settings are as follows: To
briefly explain, this can of course call someone else's mos to directly be an inverter, but we will start from the basics in order to familiarize ourselves with the operation...a little bit of painting...
this is our canvas, let's briefly introduce it.
On the left is the layer selector, and on the right is the place where
the layout is drawn. The shortcut keys commonly used when drawing the layout are: O insert via Cantact, P Path to draw the path, the smallest size, R rectangle to draw a rectangle, s to move the side (the most important Heavy... Be sure to select nothing first and then click, or you just select the graphics to move), k call up a ruler (continue to add...because I can’t remember all),
let’s simply draw a picture.
PS: According to the rules, X snap Configure it with Y snap, 0.005
1. Draw N-Well (pay attention to choose to change the layer, otherwise you will be unable to move for a long time like me, angry! And if you find that he always press G on it, it will become Do not automatically align)
2. Draw the active area
3. Draw the polysilicon
4. Use SN and SP to draw the heavily doped area, SN+AA=N+heavy doping, SP+AA=P+heavy doping,
now two have been drawn C-MOS with the gates together
5. Draw contact holes for metal connection
5. Heavy doping to connect to the substrate
6. Use Contact and Poly to lead the input out (shift+C cut shortcut key, first select Then draw a rectangle, Tab and left click to pan the view)
7. Connect with metal (M1)
8. Use Label to
select this layer for
simulation The
next thing to do is simulation. The layout simulation Calibre and the schematic simulation are very different.
1. DRC inspection
Find your DRC rules
and then RUN DRC.
I'm sorry everyone... A bunch of errors, the error report can be highlighted on the layout after double-clicking... Not much to say, let Xiao Caiji go and change it first...
Read the rules, focus I picked a few key points and wrote a blog:
https://blog.csdn.net/u010594449/article/details/105703353
Then I redrawn the inverter and drew it according to the rules...Don’t draw it blindly...
Only the metal density problem is left (...after reading the rule design, it is too exhausting to change the individual...people are furious...it is better to practice more familiarity with the rules...or directly adjust the MOS...O via is much easier...) The density problem is solved when the film is taped out... So far, the DRC detection is complete
. The LVS detection is
almost the same.
Sorry everyone, I have reported an error...Because I drew it blindly, so... hee hee length and width are different... so... I again It's going to be changed... People are stupid. Lazy people have a lazy way, hehehe I will change the schematic!
Hahaha, if I am witty,
LVS is correct, and then PEX detection (extract parasitic parameters)
. Note here that you need to change Format to Calibreview to
generate Calibre and
then simulate:
still use inv_tb to test. The
difference is to add calibre order to
complete! Well, this record ends here. The next one may be the production of full adder and review the basic principles by the way! But it may take a while... Recently there are so many things to learn