Introduction to the first chapter, the computer system
1, computer systems and performance:
-
The computer system is composed of "hardware" and "software" component.
-
Weigh the pros and cons of a computer's performance is determined based on a number of comprehensive technical indicators, various performance indicators both hardware and software, including a variety of functions.
-
Computer systems consist of hardware and software components.
-
Computer system performance determined by hardware and software.
2, the computer system 5 level in the hierarchy:
-
Microprogram machine, traditional machine, OS machine, machine assembly language, high-level language machine
-
Micro-program machines and conventional machine is physical machines, other virtual machine.
3, von Neumann machine main features:
-
The computer has five major computing unit, a memory, a controller, input and output devices composition;
-
The instructions and data stored in a memory and can be accessed by the address;
-
The instructions and data are binary representation;
-
Instruction consists of the operation code and address codes, the nature of the operation specified in the operation code, the address code indicates the position in the memory operand;
-
Instruction sequence stored in the memory, taken generally performed in automatic sequence;
-
Machine operator at the center, I / O devices and the memory also exchange data through the operator. (Later, a computer memory structure centered)
4, modern computer composition diagram:
5, the computer storage unit:
-
The storage unit: storing a memory word, and memory unit having a specific memory address;
-
Storage word: all of the binary data stored in a storage unit, according to the binary data stored in an address to access a unit acquired.
-
Memory word length: bits stored binary data word, i.e. the number of bits to access a memory cell in accordance with an address obtained by binary data;
-
Bank: a memory device constituted by a plurality of memory cells.
6, main memory MAR and MDR:
-
MAR: memory address register, an address storage unit that stores need to access. It reflects the number of memory cells.
-
MDR: storing data register, cache read / write data storage unit. It reflects the memory word length.
-
The maximum capacity of the memory is determined by a number of bits of the registers MAR and MDR register.
7, the machine word and store word:
-
Machine word: the number of bits of binary data a CPU can process.
-
Memory word length: Number of obtaining access to a storage unit in accordance with an address of binary data.
The second chapter, the computer system
-
hardware
- structure
- Host computer
- CPU
- ALU arithmetic unit
- CU controller
- Memory
- Main memory
- Auxiliary storage
- CPU
- I / O
- input device
- Output Device
- Host computer
- Main Specifications
- Machine word
- Number of data bits a CPU can handle
- storage capacity
- = Storage capacity memory storage word length × number of cells
- calculating speed
- An averaging unit time the number of instructions, MIPS
- Machine word
- structure
-
software
-
system software
- Used to manage the entire computer system
- Language processing program
- operating system
- Service procedures
- Database Management Systems
- Network Software
- Used to manage the entire computer system
-
application
-
Own ordinary software downloads
-
-
The third chapter, operation method and the operation member
1, data representation and convert
-
Number 1 machine is negative true value 0: sign plus the absolute value of
- Numerical symbols signed binary numbers, the number of machines called.
-
More than three yards: On the basis of 8421 yards on the Each code plus the 0011 Gray: any two adjacent coding only a bit different, and the same remaining three bits
- When I do not want to add two three yards a carry, the result should be subtracted 0011; when a carry, a carry signal should be sent to high, plus standard 0011
-
8421 yards
-
Weights 8, 4 descending order
-
When arithmetic operations, the need to revise the results of the operation. ?: If less than, equal to (1001) 2, does not require amendment; otherwise, plus 6 correction
-
-
2, signed binary data representation in a computer calculation and
(1) represents the original code:
-
When X is a positive number, the sign bit is 0; when X is a negative number, the sign bit is 1.
-
Other locations on the same true value
-
There are two forms of representation 0
Features:
-
-
Value + 0, -0 00000,10000 respectively of the original code, the form is not unique;
-
A positive number of original code values with the true value growth and growth, the original code values of negative growth as the true value reduction
-
-
-
n + 1 bits of the original code point represents an integer ranging from - (2n-1) ----- (2n-1)
-
n + 1 bits of the original code represent fixed-point decimal range - (1-2-n) ------ (1-2-n)
-
Calculation: absolute value of the subtraction, the calculation result decided by the numerical symbol size
(2) Anti-code representation:
-
Positive anti-code, the same code as the original complement
-
Inverted negative, bitwise, sign bit inversion
Features:
-
-
Value of zero anti-code representation is not unique
-
Anti positive code values increases as a true value, a negative value as true anti-amble value increases
-
n + 1 bits are inverted point represents an integer ranging from - (2n-1) ----- 2n-1, n + 1 bit-reversed codes represented by a decimal point range - (1-2-n) ----- 1-2-n
-
Calculation : satisfy [X + Y] trans = [X] trans + [Y] trans , [the Y-X-] trans = [X] trans + [- Y] trans
(3) complement representation:
-
From the X-seeking [X] Complement :
-
When X is a positive number, [X] Complement = X
-
When X is negative, ① bitwise negation (sign bit unchanged), ② the end plus 1
-
From [X] Complement seeking X:
- [X] complement of the sign bit is 0 (positive), [X] Complement = X
- [X] complement of the sign bit is 1 (negative), ① bitwise inverse (including sign bit), ② the end plus 1, then the negative sign in front of numerical -
-
From [X] Complement Complement:
- Bitwise negation (including the sign bit)
- End plus 1
Features:
-
-
Complement value of zero indicates the unique
-
Positive complement code value increases as the true value, a negative value as true complement of the opcode value increases
-
n + 1 bits represented by two's complement fixed-point integer ranging - 2n ---- 2n-1, n + 1 bitwise complements the decimal point represent the range -1 --- 1-2-n
-
in conclusion:
-
Complement negative mold + = negative
-
Mutually complement mode of absolute values =
-
In complement, the adder subtracting i.e.
Calculating: [X + Y] Complement = [X] Complement + [Y] up, [X-Y] Complement = [X + (- Y)] Complement = [X] Complement + [- Y] Complement
(4) represents a shift:
-
The symbol bit [X] complement negation, to obtain [X] shift
-
In order to determine the true value corresponding to the magnitude values from the code, so the introduction of frameshift
Features:
-
-
MSB is the sign bit, 1 for positive, 0 negative
-
Encoding data 0 has a unique
-
Shift code values with the true value increases
-
2n - - n + 1 point codes displacement represents an integer ranging from 2n-1, n + 1 represents the fixed-point decimal codes displacement range -1--1-2-n
-
Computer, frameshift order code used for each, so only perform addition, subtraction
-
Computer, frameshift calculation results required correction formula
-
Operations:
-
-
Frameshift defined: [X-] shift = n-th power of + X 2
-
Complement defined: [X-] Complement = n 2 + 1 + Y power
-
-
Exponent sum formula
-
[X] Shift + [Y] Complement = [X + Y] mod2 shifting the n + 1 th
-
[X] Shift + [- Y] Complement = [XY] shift
-
(5) the complement, reverse, the original, conversion frameshift
-
Inverted -----> original code
-
Method: sign bit unchanged, the same positive, negative value portion negated.
-
-
Complement -----> original code
-
Method 1: positive constant negative value plus 1 part negated.
-
Method 2: Serial Conversion
-
From the last start number, I encountered the first "1", in addition to the first "1" unchanged, before the numbers were negated
-
-
-
Frameshift -----> original code
-
Method: frameshift converted to complement, and then converted to the original code
-
(6) fixed-point and floating-point
Fixed-point numbers:
-
-
Fixed-point data in a location on the
-
32-bit fixed decimal range, complement fixed-point integer
-
32-bit fixed decimal -1 to 1-2-31
-
32-bit fixed-point integer -231 ~ 231-1
-
-
-
Float:
-
According to IEEE754 international standard, commonly used floating-point number in two formats
-
-
Nmax = Mmax2 of Emax
-
Nmin = Mmin2 of Emax
-
-
-
Single-precision (32-bit) = 8-bit mantissa exponent +24
- Single precision floating point (32 bits), the order code 8 (including a sign bit), 24 mantissa (including a sign bit) in the range: 127 -2 ~ power (-23 times 1-2 127 power side) * 2
-
Double-precision (64-bit) = 11 bits mantissa exponent +53
- Double precision floating point (64 bits), the order code 11 (including a sign bit), 53 mantissa (including a sign bit) in the range: 1023 -2 ~ power (-52 1-2 1023 th power) * 2
-
To ensure data accuracy, usually represented by mantissa normalized form: When R = 2, and the end value is not 0, the absolute value is greater than or equal to (0.5) 10 can be a floating decimal point position data.
-
Left Regulation
-
Right Regulation
-
- Representation: N = M · RE
-
Computer storage form
-
Ms + Es + E (n 位) + M (m 位)
-
Exponent E, generally is an integer, or represented by the complement shift;
-
Mantissa M, usually normalized decimal point, is represented by complement;
-
-