arduino watchdog

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Introduction

  The watchdog timer is an integral part of the single-chip microcomputer, and has important significance in the debugging and running of the single-chip microcomputer program.
The watchdog timer (WDT, Watch Dog Timer) is actually a counter. Generally, the watchdog is given a large number. After the program starts running, the watchdog starts to count down. If the program runs normally, the CPU should issue an instruction to reset the watchdog after a while, and restart the countdown. If the watchdog is reduced to 0, it is considered that the program is not working properly, forcing the entire system to reset.
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How the watchdog timer works

  When enabled, the WDT will increment until it overflows, or “time out”. Unless in Sleep or Idle mode, a WDT time-out will force the device to reset. To avoid WDT time-out reset, the user must periodically clear the watchdog timer with the PWRSAV or CLRWDT instruction. If the WDT times out in Sleep or Idle mode, the device will wake up and continue code execution from where the PWRSAV instruction was executed. In both of the above cases, the WDTO bit (RCON <4>) will be set, indicating that the device reset or wake-up event is caused by a WDT time-out. If the WDT wakes up the CPU from Sleep or Idle mode, the "Sleep" status bit (RCON <3>) or "Idle" status bit (RCON <2>) will also be set, indicating that the device was previously in power saving mode.
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function

  In addition, WatchDog can also reset the microcontroller without powering down the entire system when your program is stuck in an endless loop, thereby protecting your hardware circuit. The watchdog timer provides an independent protection system for the microcontroller. When the system fails, after an optional timeout period, the watchdog will respond with a RESET signal. For example, the optional timeout period for x25045 is 1.4 seconds. , 600 milliseconds, 200 milliseconds. When your program crashes, x25045 will reset the microcontroller.
  Most watchdog timer ICs produce a single, limited output pulse duration when the watchdog times out. This is suitable for triggering a reset or interrupting the microprocessor, but some applications require an output (fault indicator) latch.
  Considering safety issues, automotive electronic systems require monitoring circuits to monitor fault tolerance or safety. The watchdog timer can ideally meet such needs. By detecting the periodic pulses generated under normal operating conditions of the microcontroller, the failure state of the circuit or IC is detected, and once a failure occurs, it can be immediately switched to the backup / redundant system.
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Simple lock watchdog timer design

  In the watchdog (watchdog, also called watchdog timer, is a timer circuit, generally has an input, called feeding the dog (kicking the dog or service the dog), an output to the RST end of the MCU, the MCU works normally At that time, a signal is output to the dog feeding end every other end to clear the WDT.If the dog is not fed over the specified time, (generally when the program runs away), when the WDT time exceeds, it will give a reset signal to the MCU , Is the MCU reset. To prevent the MCU from crashing. The role of the watchdog is to prevent the program from looping, or to run away from the program. Out of consideration for the real-time monitoring of the operating state of the microcontroller, a special program has been developed to monitor the operation of the microcontroller. The state-of-the-art chip, commonly known as the "watchdog" (MAX 9
) integrated circuit (MAX 9), provides a latching fault indication of the loss of input pulse current in response. The circuit can monitor the fan (calculation of the output speed of the upper fan), an oscillation circuit, or a microprocessor software implementation.   Most watchdog timer ICs produce a single, limited output pulse duration when the watchdog times out. This is suitable for triggering a reset or interrupting the microprocessor, but some applications require an output (fault indicator) latch. A simple circuit (Figure 1) provides an indication of the response to input pulse flow loss latch failure. Based on the μP-supervisor / watchdog integrated circuit (MAX 9), this circuit is used to monitor the fan (calculated at the fan speed output), an oscillator circuit, or a suitable microprocessor software to execute.
  During power-up, the active low reset remains low until the VCC stabilizes and the reset timeout expires. The capacitor C passes through R until the gate voltage of the FET reaches the threshold (voltage VTH), which turns on the field effect transistor to enable the latching capability. To prevent false triggering, you should set the
RC delay time to far exceed the reset timeout.
  The WDI input (pin 6) must be set to the lowest rate by the switching capacitor CSWT. If this does not happen, the active low reset becomes low, and the LED indicator is reset during connection and low pull, thereby locking the low reset. The circuit remains active until you cycle VCC or push the switch in this condition. Either turn off the FET action and allow the reset to go high.
  In order to monitor the fan's open-drain speed measurement signal, connect a 10kΩ pull-down resistor from the world development indicator 10kΩ to VCC (pin 8). Since the fan needs some time to spin up, the watchdog circuit needs to be disabled for a short delay interval. You can reset this delay capacitor (C2) from ground. Please note that this delay must be less than the above RC delay, or the active low reset latch will be shorter too early.
For a fan monitor, set the maximum speed pulse period for the CSWT value according to the formula 5.06 × 106 × CSWT, where CSWT is within a few seconds. If the speed is lower than this threshold, the low level effectively resets the output low and latch.
Watchdog Timer Operation
  During normal operation, a WDT time-out will generate a device reset. When the device is in sleep state, a WDT time-out will wake up the device to continue normal operation (called WDT wake-up). Clearing the WDTE setting bit can permanently turn off the WDT.
  The postscaler assignment is completely controlled by software, that is, it can be changed at any time during program execution.
  To avoid unpredictable device resets, when changing from the Timer0 prescaler assignment to the WDT postscaler assignment, the following instruction sequence must be executed. Even if WDT is disabled, this instruction sequence must be executed.
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Watchdog sample code


#include <avr/wdt.h>
void setup()
{
   pinMode(13,OUTPUT);
   wdt_enable(WDTO_2S); //开启看门狗,并设置溢出时间为两秒
}
 
void loop()
{
   digitalWrite(13,HIGH);
   delay(100);
   digitalWrite(13,LOW);
   delay(100);
   wdt_reset(); //喂狗操作,使看门狗定时器复位
}

Finally
, the manual of AVRGCC is attached : http://www.arduino.cn/avrgcc/
Learning source: arduino Chinese community https://www.arduino.cn/thread-2638-1-1.html

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