DMA
DMA advantages
"DMA" is an abbreviation for Direct Memory Access. It does not use the CPU, but directly performs data transfer between peripheral functions (analog functions, communication functions, etc.) and memories (flash memory, ROM, RAM) through the bus.
Usually, data transfer is performed by the CPU, and in a microcomputer equipped with DMA, DMA represents the CPU to transfer data (see Figure 1).
Therefore, the CPU only needs arithmetic/logical operations and other tasks that the CPU can complete. As a result, by installing DMA, the performance of the microcomputer can be comprehensively improved.
The biggest advantage of DMA is to transfer data directly through hardware, thereby realizing high-speed and large-capacity data transmission. You can freely select the transmission source and transmission destination in the memory and peripheral functions (but limited by the microcomputer).
However, since only one bus is used separately from the CPU, the right to use the bus needs to be adjusted. This "bus adjustment" is called "Bus Arbitration" in English.
Basic operation of DMA
This is the case when data is extracted from RAM and sent to the communication function. Generally, when the CPU performs data transfer (Figure 2(A)), it first reads the data from the RAM. Once the read data passes through the ALU in the CPU. Then, the ALU directly outputs the data without any processing on the data, and sends the data to the communication function. DMA reads data from RAM and transfers it to the communication function without passing through the CPU.
At this time, the CPU will not be used, so you can use ALU for another calculation. As a microcomputer, it can process two tasks in parallel, which is very efficient.
First, the CPU sets the number of data, source/destination addresses, transfer mode, etc. in the DMA. Then, when the DMA transfer is triggered, the DMA starts to transfer. The trigger for DMA transfer start can be triggered by software or hardware. After the DMA transfer is over, the DMA sends an interrupt to the CPU to notify the end of the transfer.
Arbitration type (shared bus authority with CPU)
DMA is convenient but not a panacea. There is only one bus, so when the DMA uses the bus, the CPU cannot use the bus. If the DMA uses the bus for a long time to transfer a large amount of data, the CPU will not be able to use the bus during this period, resulting in a problem that the calculation result cannot be stored in the memory. Therefore, it is necessary to efficiently use the bus for adjustment between the CPU and DMA. This is called bus arbitration.
Also, the right to use the bus is called bus right. Bus arbitration is to coordinate (mediate) who owns the right of the bus.
There are several ways of bus arbitration. Typical ones are Round-Robin, Cycle stealing, and burst.
Round-Robin is a way to give up bus rights in order. For example, if there are two bus masters, if the CPU uses the bus, the next bus cycle uses DMA, and then the bus uses the CPU alternately.
The method called Cycle stealing is to paint between bus cycles when the CPU does not access the memory, and DMA uses the bus.
The burst mode refers to the mode in which a bus Master has the right to the bus within a certain period of time. Use when you want to quickly transfer high-priority data. For example, when the DMA sends 10 high-priority data, the DMA will occupy the bus until all these 10 data are transmitted.
Precautions for use
Give two examples of problems that arise when using DMA. One is overrun, and the other is the loss of main memory data that occurs when used with cache.
Due to communication functions and other reasons, when the CPU or DMA does not read the data in the receive buffer, the CPU or DMA will capture the next data, resulting in the loss of the previous received data. If the bus arbitration is the Round-Robin method, it is difficult to overrun, but if it is the Cycle stealing or burst method, the CPU or DMA cannot use the bus, and the waiting time for the bus right will become longer. During this period, the communication function will overrun when it receives the following data. Overruns can also occur in other situations.
In a system using a cache, when the DMA rewrites the main memory with the same address as the data in the cache, the coherency of the data between the cache and the main memory will be lost.
For example, when the CPU writes data into the memory, if the pass-through method is adopted, the data is written into the cache, and the same data is also written into the main memory. If the DMA erroneously rewrites the data on the main memory, the cached data and the main memory data will be different. After that, when the CPU reads the data, the data in the cache will be read and a value different from the main memory value will be read. If you have a mechanism to maintain the consistency between the cache and DMA, but if there is no mechanism, the user must manage the consistency of the data.