Direct memory access (DMA), is a memory access technique in computer science . It allows some hardware subsystems (computer peripherals) inside the computer to directly read and write the system memory independently without the intervention of the central processing unit (CPU). It is a fast data transfer method under the same degree of processor burden. Many hardware systems use it, including hard disk controllers, graphics cards , network cards, and sound cards.
direct memory access
DMA is an important feature of all modern computers, allowing hardware devices of different speeds to communicate without relying on the heavy interrupt load of the CPU . Otherwise, the CPU needs to copy each piece of data from the source to the scratchpad , and then write them back again to the new location. During this time, the CPU is unavailable for other work.
DMA transfers are often used to copy a memory area from one device to another. When the CPU initiates the transfer action, the transfer action itself is executed and completed by the DMA controller . A typical example is moving a block of external memory to faster memory inside the chip. Operations like this don't stall processor work so that it can be rescheduled to handle other work. DMA transfers are essential for high performance embedded system algorithms and networking. For example, the ISA DMA controller of a personal computer has 8 DMA channels, 7 of which can be used by the computer's central processing unit. Each DMA channel has a 16-bit address register and a 16-bit count register. To initiate a data transfer, the device driver sets together the address and count register of the DMA channel, as well as the direction of the data transfer, read or write. Then instruct the DMA hardware to start the transfer. When the transmission is over, the device notifies the central processing unit with an interrupt.
"Scatter-gather" (Scatter-gather) DMA allows data to be transferred to multiple memory areas in a single DMA transaction. It is equivalent to stringing multiple simple DMA requests together. Again, the purpose of doing this is to relieve the CPU of multiple I/O interrupts and data copying tasks. DRQ means DMA request; DACK means DMA confirmation. These symbols are generally seen on the hardware profile of computer systems with DMA capabilities. They represent the electronic signal transmission lines between the CPU and the DMA controller.
Cache coherency issues
DMA can cause cache coherency issues. Imagine a situation where the CPU has a cache and external memory, and the operation of DMA is to access the external memory. When the CPU accesses a certain address of the external memory, it temporarily writes the new value In the cache, but the data in the external memory has not been updated. If DMA occurs before the data in the cache is updated to the external memory, the DMA process will read the data that has not been updated.
Similarly, if the external device writes a new value into the external memory, the central processing unit will access the data that has not been updated when accessing the cache.
These problems can be solved in two ways:
- Cache-coherent system: It is implemented by hardware. When an external device writes to the memory, a signal is used to notify the cache controller that the value of a certain memory address has expired or the data should be updated.
- Non-coherent system (Non-coherent system): Completed by software method, the operating system must confirm that the DMA program has started or prohibits DMA when the cache is read.
The second method will cause the system burden of DMA.
DMA engine
In addition to being related to hardware interaction, DMA can also offload memory consumption. Such as Intel I/O Acceleration Technology (IOAT). The successor to IOAT is the Data Direct I/O (DDIO) technology of the Xeon E5 processor.
refer to
external link
- mmap() and DMA , from Linux Device Drivers, Second Edition , Alessandro Rubini & Jonathan Corbet
- DMA and interrupt handling
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