DMA (serial port DMA send and receive)

1. Introduction to DMA

1. Basic definition of DMA

DMA (Direct Memory Access) is an important feature of all modern computers, allowing hardware devices of different speeds to communicate without relying on the CPU's heavy interrupt load. Otherwise, the CPU needs to copy each fragment's data from the source to the scratchpad, and then write them back again to the new location. During this time, the CPU is unavailable for other work.

2. DMA transmission mode

The emergence of DMA technology enables peripheral devices to directly access memory through a DMA controller, and at the same time, the CPU can continue to execute programs. So how does the DMA controller and the CPU use the memory in time-sharing?
Usually, the following three methods are used:
(1) Stop the CPU from accessing the memory;
(2) Cycle embezzlement;
(3) DMA and the CPU alternately access the memory.

3. DMA transmission principle

DMA transfers copy data from one address space to another. When the CPU initiates the transfer, the transfer itself is executed and completed by the DMA controller. A typical example is moving a block of external memory to a faster memory area inside the chip. Instead of stalling processor work, operations like this can be rescheduled to handle other work. DMA transfers are important for high-performance embedded system algorithms and networks.
When implementing DMA transmission, the DMA controller is directly in charge of the bus, so there is a problem of bus control right transfer. That is, before the DMA transfer, the CPU should hand over the control of the bus to the DMA controller, and after the DMA transfer is completed, the DMA controller should immediately return the control of the bus to the CPU. A complete DMA transfer process must go through 4 steps: DMA request, DMA response, DMA transfer, and DMA end.

4. Main features of DMA

·Each channel is directly connected to a dedicated hardware DMA request, each channel also supports software triggering, and these functions are configured through software.
On the same DMA module, the priority among multiple requests can be set by software programming (there are four levels in total: very high, high, medium and low), and when the priority setting is equal, it is determined by the hardware (request 0 has priority over request 1 ,So on and so forth).
·Transfer width (byte, half word, full word) of independent data source and target data area, simulating the process of packing and unpacking. The source and destination addresses must be aligned to the data transfer width.
• Support circular buffer management.
·Each channel has 3 event flags (DMA half transfer, DMA transfer complete and DMA transfer error), these 3 event flag logic or become a separate interrupt request.
·Transfer between memory and memory, peripheral and memory, memory and peripheral.
· Flash memory, SRAM, SRAM of peripherals, APB1, APB2 and AHB peripherals can be used as source and target of access.
·Programmable data transmission number: the maximum is 65535 (0xFFFF).

5. DMA working principle block diagram

2. Generate chip code through STMCude

1. Set RCC

As shown in the picture:

2. Set the USART

Select USART1, set as shown in the figure

Click NVIC Setting next to it, and set as follows

3. DMA settings

as shown in the picture

(1), DMA basic settings

Find the DMA on the right System Core
as shown in

DMA Request: the corresponding peripheral for DMA transfer

Note: If you add DMA on the DMA setting interface without enabling the corresponding peripheral, the default is MENTOMEN

Channel DMA transmission channel setting
DMA1: DMA1 Channel 0~DMA1 Channel 7
DMA2: DMA2 Channel 1~DMA1 Channel 5

Dirction: DMA transfer direction
Four transfer directions:

Peripheral To Memory Peripheral To Memory
Memory To Peripheral Memory To Peripheral
Memory To Memory
Peripheral To Peripheral To Peripheral
Priority: Transfer Speed

Highest priority Very High
high priority High
medium priority Medium
low priority; Low
2DMA transfer mode

Normal: normal mode
When a DMA data transfer is completed, stop DMA transfer, that is, only transfer once

Circular: circular mode

After the transmission is completed, it restarts to continue the transmission, and the continuous loop never stops

3DMA pointer increment setting

Increment Address: The address pointer increments (introduced above).

Src Memory on the left indicates the peripheral address register

Function: Set whether the peripheral address is unchanged or incremented when transferring data. If it is set to increase, then the next transmission will add Data Width bytes to the address, and Dst Memory on the right represents the memory address register

Function: Set whether the memory address is incremented when transferring data. If it is set to increase, then the next transmission will add Data Width bytes to the address, which is the same as Src Memory, but it is for memory.

3. Clock setting

4. Create a project to generate code

The same save path and file name cannot appear in Chinese, otherwise the code save will be wrong.

After the IDE selects MDK-ARM and checks these two, you can save the file and generate the code.

3. Modulate keil code

Open the file just generated, find the main.c file and open it
Add in the main function

 /* USER CODE BEGIN Init */
	uint8_t Senbuff[] = "\r\n**** Serial Output Message by DMA ***\r\n   UART DMA Test \r\n   Zxiaoxuan";  //定义数据发送数组
  /* USER CODE END Init */

In the while loop add

  while (1)
  {
    
    
    /* USER CODE END WHILE */
			HAL_UART_Transmit_DMA(&huart1, (uint8_t *)Senbuff, sizeof(Senbuff));
	        HAL_Delay(1000);
    /* USER CODE BEGIN 3 */
  }

4. Use mcuisp to burn the code to the chip

After the burning is completed, you can check the situation in the serial port assistant

5. Results display

6. Reference

https://blog.csdn.net/as480133937/article/details/104827639/
https://baike.baidu.com/item/DMA/2385376#%E4%BC%A0%E9%80%81%E6%96%B9%E5%BC%8F
https://blog.csdn.net/as480133937/article/details/98845509