STM32F103ZET6 TIM basic timer theory part

在这里插入代码片## TIM basic timer

Hello everyone, this is my first time to come into contact with a blog. Please forgive me for any bad writing.

Since several of my classmates and I signed up for a shooting robot competition, we unanimously decided to use STM32F103 as our core board. But our foundation only stays on AT89C51, so we need to learn STM32 knowledge from scratch.

The purpose of the future articles is to summarize and summarize the notes again after I finish studying. If there is any mistake, please correct me, thank you.

Today, I am studying the theoretical part of TIM's basic timer, and the development board used is Wildfire STM32F103ZET6 domineering. Let's take a look at the introduction of the basic timer:
1. The counter is 16bit and can only count up.
2. There is no external GPIO, it is an internal resource and can only be used for timing.
3. The clock comes from PCLK1, which is 72M, which can be divided by 1 to 65536.

The following is the functional block diagram of the basic timer:Insert picture description here

It contains three parts: clock source, controller, time base

Clock source: The
clock source comes from TIMx_CLK of RCC, which belongs to the internal CK_INT

Controller:
1. The controller is used to control the reset, enable, count and trigger DAC of the timer.
2. The registers involved are CR1/2, PIER, EGR, SR.

The time base (the heart
of the timer ) is the most important part of the timer, including the prescaler, counter, and auto-reload register.
1. After the 16-bit prescaler PSC divides the internal clock CK_PSC, the counter clock CK_CNT=CK_PSC/(PSC+1) is obtained.
2. The counter CNT counts under the drive of the counter clock, and the time of one count is 1/ CK_CNT.

After the counter and the auto-reload register
timer are enabled, the counter CNT counts under the drive of CK_CNT. When the value of TCNT is equal to the set value of ARR, an event is automatically generated and CNT is automatically cleared, and then restarts counting. Repeat the above process .

I wonder if you see the shaded part under the PSC prescaler and auto-reload register in the above functional block diagram? That is the shadow register. Its existence serves as a buffer. User->register->shadow register->function. If the shadow register is not used, the user value will only take effect in the register after it is written.

Attached is a code of time base initialization structure:

typedef struct
{
    
    
uint16_t TIM_Prescaler;//分频因子

uint16_t TIM_CounterMode;//计数模式。基本定时器只能向上计数

uint32_t TIM_Period;//自动重装载值

uint16_t TIM_ClockDivision;//外部输入时钟分频因子,基本定时器没有

uint8_t  TIM_RepetitionCounter;//重复定时器,高级定时器专用
}
TIM_TimeBaseInitTypeDef;

I will finish here today, and I will finish the 500ms timing instance two days after tomorrow.

Guess you like

Origin blog.csdn.net/weixin_41679822/article/details/100182868