Hello everyone, I finally resumed the update. Today I will explain to you the last part of advanced timer theory.
Output comparison
The output comparison is to output the control signal through the external pin of the timer. There is freezing, channel X (X=1,2,3,4) is set to output valid level when matching, and channel X is set to output invalid voltage when matching. There are eight modes of leveling, flipping, and forced to invalid level, PWM1 and PWM2. Which mode is used is configured by register CCMRx[2:0]. Among them, PWM mode is a special case in the output comparison, and it is also used the most.
This is the functional block diagram of the output comparison:
This functional block diagram consists of four parts. Let's take a look at their respective functions.
1. Output comparison register
When the value of the counter CNT is equal to the value of the comparison register CCR, the polarity of the output reference signal OCxREF will change, where OCxREF=1 is called the effective level, and OCxREF=0 is called It is an invalid level, and a comparison interrupt CCx1 will be generated, and the corresponding flag bit CCxIF will be set. Then OCxREF will become the real output signal OCx/OCxN after a series of controls.
2.
On the basis of the generated reference waveform OCxREF , the dead-band generator can insert dead-time to generate two complementary output signals OCx and OCxN. The size of the dead-time is specifically determined by the bit ETG[7: 0] Configuration. The size of the dead time must be adjusted by the device connected to the output signal and its characteristics.
3. Output control
The functional block diagram of the output control is shown as follows:
In the output control of output comparison, the reference signal OCxREF will produce two channels with dead zone after passing through the dead zone generator. The two channels have good complementarity with dead zone. Enter the output control circuit, if the dead zone control is not added, then the signal of the output control circuit into the picture is directly OCxREF.
The signal entering the output control circuit will be divided into two paths, one is the original signal, and the other is the reversed signal, which is specifically controlled by the bits CCxP and CCxNP of the CCER register. Whether the OCx pin of the signal after the polarity selection is output to the external pin CHx/CHxN is configured by the bit CxE/CxNE of the CCER bit of the register.
If the disconnection function is added, the MOE/OSSI and OSSR of the disconnection and dead zone register BDTR will affect the output signal together.
4.
The output signal of the output pin output comparison is finally output through the timer's external IO, which are respectively CH1/2/3/4. The first three channels also have complementary output channels CH1/2/3N. For detailed IO description, please refer to the relevant data manual.
So what are the applications of input capture?
First we see this picture:
this picture is a schematic diagram of measuring pulse width and frequency
For the first capture, let CNT be cleared in the interrupt, capture the register and configure the edge as a falling edge; when the capture value2 is not 0, the width can be calculated. If you do not change the edge configuration, then the second capture is still the rising edge, and the value of one period can be obtained at this time.
Let's look at another picture:
This picture is the input mode of PWM. It is divided into direct connection and indirect connection. And it can only be captured by channels one and two.
In the case of direct connection, enter from TI1, trigger by TI1FP1, and connect to IC1, corresponding to the cycle; automatically captured by hardware, take the TI1FP2 road, connect to IC2, the corresponding data is pulse width.
In the case of non-direct connection, select TI1FP2 as the trigger signal, and the period is captured by IC2; select TI1FP1 to connect to IC1 to capture the duty cycle, that is, the pulse width.
So what are the applications for output comparison?
The application of output comparison is relatively simple:
1. There are a total of 8 output comparison modes, the most commonly used is PWM mode.
2. It is configured by bits OCxM[2:0] of register CCMRx.
Next, let me briefly introduce the PWM output mode:
PWM output is an external output square wave signal with adjustable pulse width. The signal frequency is determined by the value of the automatic reload register ARR, and the duty cycle is determined by the value of the compare register CCR.
So what is the difference between PWM1 and PWM2 mentioned earlier? The specific difference is as follows:
PS is valid at high level and invalid at low level.
Speaking of this, all the theoretical knowledge about TIM advanced timer has been explained to you. I believe you have a preliminary understanding of advanced timers. Next we are about to start the practical explanation, hope you will digest it, thank you