TIM-Advanced Timer
Hello everyone, today I will summarize the first part of the theoretical knowledge of STM32F103 advanced timer.
The advanced timer is divided into the following parts:
1. Counter 16bit, up/down/both counting, TIM8 and TIM1, and a repeat counter RCR
2. There are 4 GPIOs, of which channels 1~3 have complementary output GPIO
3 , The clock comes from PCLK2, which is 72M, which can be divided by 1-65536
The specific GPIO description can be seen in the following table
The advanced timer explanation is divided into the following parts:
1. Clock source
2. Controller
3. Time base
4. Input capture
5. Output comparison
1. Clock source
Clock sources are divided into the following types:
1. Internal clock source CK_INT
2. External clock mode 1——External GPIO Tix(x=1/2/3/4)
3. External clock mode 2—— External GPIO ETR
4, internal trigger input
PS internal clock source comes from TIMx_CLK of RCC
Next, I will explain the working mode of external clock mode 1:
The following is the flowchart of external clock mode 1 (the picture is from the wildfire tutorial)
(1) Clock signal input pin
1. External GPIO Tix corresponds to TIMx_CH1/2/3/4
2. Bit CCxS[1:0] configuration of TIM_CCMRx, where CCMR1 controls TI1/2 and CCMR2 controls TI3/4
(2) Filter
1. If the frequency of the external clock signal is too high or mixed with high-frequency interference signals, we need to use a filter to resample the ETRP signal to achieve the purpose of frequency reduction or removal of high-frequency interference .
2. Configured by TIMx_CCMRx bit ICxF[3:0]
(3) Edge detection
1. The signal of edge detection comes from the output of the filter. Before it becomes a trigger signal, edge detection is required to determine whether the rising edge is valid or the falling edge is valid.
2. Configured by TIMx_CCMRx bits CCxP and CCxNP
(4) Trigger selection
1. When using external clock mode 1, there are two trigger sources, one is the filtered timer input 1 (TI1FP1) and the filtered timer input 2 (TI2FP2).
2. By the bit TS[2:0] of TIMx_SMCR
(5) From mode selection
1. After selecting the trigger source signal, finally we need to connect the signal to the TGRI pin to make the trigger signal the input of the external clock mode 1, and finally equal to CK_PSC, and then drive the counter CNT to compare.
2. The specific configuration of TIMx_SMCR bits SMS[2:0] is 000, you can select the external clock mode 1
Next, let’s take a look at the components of external clock mode 2.
The following is the functional block diagram of external clock mode 2 (the picture is from the Wildfire tutorial):
(1) Clock signal input pin
When using external clock mode 2, the clock signal comes from the timer's specific input channel TIMx_ETR, and there is only one.
(2) External trigger polarity
1. The signal input from the ETR pin can be selected as the rising edge or the falling edge valid.
2. It is specifically configured by the bit ETP of TIMx_SMCR.
(3) External trigger prescaler
1. Since the frequency of the ETRP signal cannot exceed 1/4 of TIMx_CLK (180M), when the frequency of the trigger signal is high, the prescaler must be used to reduce the frequency.
2. The specific configuration is configured by the TIMx_SMCR bit ETPS[1:0].
(4) Filter
1. If the frequency of the ETRP signal is too high or mixed with high-frequency interference signals, it is necessary to use a filter to resample the ETRP signal to achieve the purpose of frequency reduction or removal of high frequencies.
2. The specific configuration is by the bits ETF[3:0] of TIMx_SMCR, where fDTS is obtained by dividing the internal clock CK_INT, and the specific configuration is by the bits CKD[1:0] of TIMx_CR1.
(5) From mode selection
1, after the signal filtered by the filter is connected to the ETRF pin, the trigger signal becomes the input of the external clock mode 2, which is finally equal to CK_PSC, and then drives the counter CNT to count
2. The specific configuration TIMx_SMCR bit ECE is 1 to select the external clock mode 2
(6) Enabling the counter
After the above five steps, only need to enable the counter to start counting, even if the configuration of external clock mode 2 is completed, it is configured by the bit CEN of TIMx_CR1.
Then, let's look at the concept of internal trigger input and controller. Since these two parts are relatively simple, I won't repeat them one by one. Let's take a look and understand it briefly.
The internal trigger input is a prescaler that uses one timer as another timer. On the hardware, the advanced control timer and general timer are connected together internally, which can realize the synchronization and cascade of the timers. It is usually configured by TS[2:0] of TIMx_SMCR.
The controller is even simpler. As the name suggests, the controller is used to control and send commands. When we learn 32, we mainly learn CR1, CR2, SMCR, CCER. Let me remind you that SMCR is mainly used for input capture and output comparison, which I will talk about in the next two periods.
Finally, good night everyone.