zedboard adau1761新工程的设备树修改（二）

其他 2018-07-05 09:00:32 阅读次数: 0

本文将介绍下对工程自动生成的设备树进行修改，加入adau1761设备相关的节点信息。
在上一篇文章中，加载hdf文件后，使用petalinux-config指令后，会自动生成设备树文件，共如下图中6个设备树文件。设备树的知识总结见：https://www.cnblogs.com/tureno/articles/6399782.html
这里写图片描述
（1）skeleton.dtsi

/*
 * Skeleton device tree; the bare minimum needed to boot; just include and
 * add a compatible value.  The bootloader will typically populate the memory
 * node.
 */

/ {
    #address-cells = <1>;
    #size-cells = <1>;
    chosen { };
    aliases { };
    memory { device_type = "memory"; reg = <0 0>; };
};

（2）zynq-7000.dtsi

/*
 *  Copyright (C) 2011 - 2014 Xilinx
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
/include/ "skeleton.dtsi"

/ {
    compatible = "xlnx,zynq-7000";

    cpus {
        #address-cells = <1>;
        #size-cells = <0>;

        cpu@0 {
            compatible = "arm,cortex-a9";
            device_type = "cpu";
            reg = <0>;
            clocks = <&clkc 3>;
            clock-latency = <1000>;
            cpu0-supply = <&regulator_vccpint>;
            operating-points = <
                /* kHz    uV */
                666667  1000000
                333334  1000000
            >;
        };

        cpu@1 {
            compatible = "arm,cortex-a9";
            device_type = "cpu";
            reg = <1>;
            clocks = <&clkc 3>;
        };
    };

    pmu {
        compatible = "arm,cortex-a9-pmu";
        interrupts = <0 5 4>, <0 6 4>;
        interrupt-parent = <&intc>;
        reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
    };

    regulator_vccpint: fixedregulator@0 {
        compatible = "regulator-fixed";
        regulator-name = "VCCPINT";
        regulator-min-microvolt = <1000000>;
        regulator-max-microvolt = <1000000>;
        regulator-boot-on;
        regulator-always-on;
    };

    amba: amba {
        compatible = "simple-bus";
        #address-cells = <1>;
        #size-cells = <1>;
        interrupt-parent = <&intc>;
        ranges;

        adc: adc@f8007100 {
            compatible = "xlnx,zynq-xadc-1.00.a";
            reg = <0xf8007100 0x20>;
            interrupts = <0 7 4>;
            interrupt-parent = <&intc>;
            clocks = <&clkc 12>;
        };

        can0: can@e0008000 {
            compatible = "xlnx,zynq-can-1.0";
            status = "disabled";
            clocks = <&clkc 19>, <&clkc 36>;
            clock-names = "can_clk", "pclk";
            reg = <0xe0008000 0x1000>;
            interrupts = <0 28 4>;
            interrupt-parent = <&intc>;
            tx-fifo-depth = <0x40>;
            rx-fifo-depth = <0x40>;
        };

        can1: can@e0009000 {
            compatible = "xlnx,zynq-can-1.0";
            status = "disabled";
            clocks = <&clkc 20>, <&clkc 37>;
            clock-names = "can_clk", "pclk";
            reg = <0xe0009000 0x1000>;
            interrupts = <0 51 4>;
            interrupt-parent = <&intc>;
            tx-fifo-depth = <0x40>;
            rx-fifo-depth = <0x40>;
        };

        gpio0: gpio@e000a000 {
            compatible = "xlnx,zynq-gpio-1.0";
            #gpio-cells = <2>;
            clocks = <&clkc 42>;
            gpio-controller;
            interrupt-parent = <&intc>;
            interrupts = <0 20 4>;
            reg = <0xe000a000 0x1000>;
        };

        i2c0: i2c@e0004000 {
            compatible = "cdns,i2c-r1p10";
            status = "disabled";
            clocks = <&clkc 38>;
            interrupt-parent = <&intc>;
            interrupts = <0 25 4>;
            reg = <0xe0004000 0x1000>;
            #address-cells = <1>;
            #size-cells = <0>;
        };

        i2c1: i2c@e0005000 {
            compatible = "cdns,i2c-r1p10";
            status = "disabled";
            clocks = <&clkc 39>;
            interrupt-parent = <&intc>;
            interrupts = <0 48 4>;
            reg = <0xe0005000 0x1000>;
            #address-cells = <1>;
            #size-cells = <0>;
        };

        intc: interrupt-controller@f8f01000 {
            compatible = "arm,cortex-a9-gic";
            #interrupt-cells = <3>;
            interrupt-controller;
            reg = <0xF8F01000 0x1000>,
                  <0xF8F00100 0x100>;
        };

        L2: cache-controller@f8f02000 {
            compatible = "arm,pl310-cache";
            reg = <0xF8F02000 0x1000>;
            interrupts = <0 2 4>;
            arm,data-latency = <3 2 2>;
            arm,tag-latency = <2 2 2>;
            cache-unified;
            cache-level = <2>;
        };

        mc: memory-controller@f8006000 {
            compatible = "xlnx,zynq-ddrc-a05";
            reg = <0xf8006000 0x1000>;
        };

        ocmc: ocmc@f800c000 {
            compatible = "xlnx,zynq-ocmc-1.0";
            interrupt-parent = <&intc>;
            interrupts = <0 3 4>;
            reg = <0xf800c000 0x1000>;
        };

        uart0: serial@e0000000 {
            compatible = "xlnx,xuartps", "cdns,uart-r1p8";
            status = "disabled";
            clocks = <&clkc 23>, <&clkc 40>;
            clock-names = "uart_clk", "pclk";
            reg = <0xE0000000 0x1000>;
            interrupts = <0 27 4>;
        };

        uart1: serial@e0001000 {
            compatible = "xlnx,xuartps", "cdns,uart-r1p8";
            status = "disabled";
            clocks = <&clkc 24>, <&clkc 41>;
            clock-names = "uart_clk", "pclk";
            reg = <0xE0001000 0x1000>;
            interrupts = <0 50 4>;
        };

        spi0: spi@e0006000 {
            compatible = "xlnx,zynq-spi-r1p6";
            reg = <0xe0006000 0x1000>;
            status = "disabled";
            interrupt-parent = <&intc>;
            interrupts = <0 26 4>;
            clocks = <&clkc 25>, <&clkc 34>;
            clock-names = "ref_clk", "pclk";
            #address-cells = <1>;
            #size-cells = <0>;
        };

        spi1: spi@e0007000 {
            compatible = "xlnx,zynq-spi-r1p6";
            reg = <0xe0007000 0x1000>;
            status = "disabled";
            interrupt-parent = <&intc>;
            interrupts = <0 49 4>;
            clocks = <&clkc 26>, <&clkc 35>;
            clock-names = "ref_clk", "pclk";
            #address-cells = <1>;
            #size-cells = <0>;
        };

        qspi: spi@e000d000 {
            clock-names = "ref_clk", "pclk";
            clocks = <&clkc 10>, <&clkc 43>;
            compatible = "xlnx,zynq-qspi-1.0";
            status = "disabled";
            interrupt-parent = <&intc>;
            interrupts = <0 19 4>;
            reg = <0xe000d000 0x1000>;
            #address-cells = <1>;
            #size-cells = <0>;
        };

        smcc: memory-controller@e000e000 {
            #address-cells = <1>;
            #size-cells = <1>;
            status = "disabled";
            clock-names = "memclk", "aclk";
            clocks = <&clkc 11>, <&clkc 44>;
            compatible = "arm,pl353-smc-r2p1";
            interrupt-parent = <&intc>;
            interrupts = <0 18 4>;
            ranges ;
            reg = <0xe000e000 0x1000>;
            nand0: flash@e1000000 {
                status = "disabled";
                compatible = "arm,pl353-nand-r2p1";
                reg = <0xe1000000 0x1000000>;
                #address-cells = <0x1>;
                #size-cells = <0x1>;
            };
            nor0: flash@e2000000 {
                status = "disabled";
                compatible = "cfi-flash";
                reg = <0xe2000000 0x2000000>;
                #address-cells = <1>;
                #size-cells = <1>;
            };
        };

        gem0: ethernet@e000b000 {
            compatible = "cdns,gem";
            reg = <0xe000b000 0x1000>;
            status = "disabled";
            interrupts = <0 22 4>;
            clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
            clock-names = "pclk", "hclk", "tx_clk";
            #address-cells = <1>;
            #size-cells = <0>;
        };

        gem1: ethernet@e000c000 {
            compatible = "cdns,gem";
            reg = <0xe000c000 0x1000>;
            status = "disabled";
            interrupts = <0 45 4>;
            clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;
            clock-names = "pclk", "hclk", "tx_clk";
            #address-cells = <1>;
            #size-cells = <0>;
        };

        sdhci0: sdhci@e0100000 {
            compatible = "arasan,sdhci-8.9a";
            status = "disabled";
            clock-names = "clk_xin", "clk_ahb";
            clocks = <&clkc 21>, <&clkc 32>;
            interrupt-parent = <&intc>;
            interrupts = <0 24 4>;
            reg = <0xe0100000 0x1000>;
        };

        sdhci1: sdhci@e0101000 {
            compatible = "arasan,sdhci-8.9a";
            status = "disabled";
            clock-names = "clk_xin", "clk_ahb";
            clocks = <&clkc 22>, <&clkc 33>;
            interrupt-parent = <&intc>;
            interrupts = <0 47 4>;
            reg = <0xe0101000 0x1000>;
        };

        slcr: slcr@f8000000 {
            #address-cells = <1>;
            #size-cells = <1>;
            compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
            reg = <0xF8000000 0x1000>;
            ranges;
            clkc: clkc@100 {
                #clock-cells = <1>;
                compatible = "xlnx,ps7-clkc";
                fclk-enable = <0xf>;
                clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
                        "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
                        "dci", "lqspi", "smc", "pcap", "gem0", "gem1",
                        "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
                        "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1",
                        "dma", "usb0_aper", "usb1_aper", "gem0_aper",
                        "gem1_aper", "sdio0_aper", "sdio1_aper",
                        "spi0_aper", "spi1_aper", "can0_aper", "can1_aper",
                        "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper",
                        "gpio_aper", "lqspi_aper", "smc_aper", "swdt",
                        "dbg_trc", "dbg_apb";
                reg = <0x100 0x100>;
            };

            pinctrl0: pinctrl@700 {
                compatible = "xlnx,pinctrl-zynq";
                reg = <0x700 0x200>;
                syscon = <&slcr>;
            };
        };

        dmac_s: dmac@f8003000 {
            compatible = "arm,pl330", "arm,primecell";
            reg = <0xf8003000 0x1000>;
            interrupt-parent = <&intc>;
            interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
                "dma4", "dma5", "dma6", "dma7";
            interrupts = <0 13 4>,
                         <0 14 4>, <0 15 4>,
                         <0 16 4>, <0 17 4>,
                         <0 40 4>, <0 41 4>,
                         <0 42 4>, <0 43 4>;
            #dma-cells = <1>;
            #dma-channels = <8>;
            #dma-requests = <4>;
            clocks = <&clkc 27>;
            clock-names = "apb_pclk";
        };

        devcfg: devcfg@f8007000 {
            clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
            clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
            compatible = "xlnx,zynq-devcfg-1.0";
            interrupt-parent = <&intc>;
            interrupts = <0 8 4>;
            reg = <0xf8007000 0x100>;
            syscon = <&slcr>;
        };

        global_timer: timer@f8f00200 {
            compatible = "arm,cortex-a9-global-timer";
            reg = <0xf8f00200 0x20>;
            interrupts = <1 11 0x301>;
            interrupt-parent = <&intc>;
            clocks = <&clkc 4>;
        };

        ttc0: timer@f8001000 {
            interrupt-parent = <&intc>;
            interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
            compatible = "cdns,ttc";
            clocks = <&clkc 6>;
            reg = <0xF8001000 0x1000>;
        };

        ttc1: timer@f8002000 {
            interrupt-parent = <&intc>;
            interrupts = <0 37 4>, <0 38 4>, <0 39 4>;
            compatible = "cdns,ttc";
            clocks = <&clkc 6>;
            reg = <0xF8002000 0x1000>;
        };

        scutimer: timer@f8f00600 {
            interrupt-parent = <&intc>;
            interrupts = <1 13 0x301>;
            compatible = "arm,cortex-a9-twd-timer";
            reg = <0xf8f00600 0x20>;
            clocks = <&clkc 4>;
        };

        usb0: usb@e0002000 {
            compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
            status = "disabled";
            clocks = <&clkc 28>;
            interrupt-parent = <&intc>;
            interrupts = <0 21 4>;
            reg = <0xe0002000 0x1000>;
            phy_type = "ulpi";
        };

        usb1: usb@e0003000 {
            compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
            status = "disabled";
            clocks = <&clkc 29>;
            interrupt-parent = <&intc>;
            interrupts = <0 44 4>;
            reg = <0xe0003000 0x1000>;
            phy_type = "ulpi";
        };

        watchdog0: watchdog@f8005000 {
            clocks = <&clkc 45>;
            compatible = "cdns,wdt-r1p2";
            interrupt-parent = <&intc>;
            interrupts = <0 9 1>;
            reg = <0xf8005000 0x1000>;
            timeout-sec = <10>;
        };
    };
};

(3)pcw.dtsi

/*
 * CAUTION: This file is automatically generated by Xilinx.
 * Version: HSI 2015.4
 * Today is: Fri Jun 22 10:52:12 2018
*/


/ {
    cpus {
        cpu@0 {
            operating-points = <666666 1000000 333333 1000000>;
        };
    };
};
&gem0 {
    phy-mode = "rgmii-id";
    status = "okay";
    xlnx,ptp-enet-clock = <0x69f6bcb>;
};
&gpio0 {
    emio-gpio-width = <64>;
    gpio-mask-high = <0x0>;
    gpio-mask-low = <0x5600>;
};
&intc {
    num_cpus = <2>;
    num_interrupts = <96>;
};
&qspi {
    is-dual = <0>;
    num-cs = <1>;
    status = "okay";
};
&sdhci0 {
    status = "okay";
    xlnx,has-cd = <0x1>;
    xlnx,has-power = <0x0>;
    xlnx,has-wp = <0x1>;
};
&spi0 {
    is-decoded-cs = <0>;
    num-cs = <3>;
    status = "okay";
};
&spi1 {
    is-decoded-cs = <0>;
    num-cs = <3>;
    status = "okay";
};
&uart1 {
    current-speed = <115200>;
    device_type = "serial";
    port-number = <0>;
    status = "okay";
};
&usb0 {
    dr_mode = "host";
    phy_type = "ulpi";
    status = "okay";
};
&clkc {
    fclk-enable = <0x3>;
    ps-clk-frequency = <33333333>;
};

(4)pl.dtsi文件，本例中要修改的就是这个pl.dtsi文件，具体修改下面的修改部分。

/*
 * CAUTION: This file is automatically generated by Xilinx.
 * Version: HSI 2015.4
 * Today is: Fri Jun 22 10:52:12 2018
*/


/ {
    amba_pl: amba_pl {
        #address-cells = <1>;
        #size-cells = <1>;
        compatible = "simple-bus";
        ranges ;
        axi_hdmi_clkgen: axi_clkgen@79000000 {
            compatible = "xlnx,axi-clkgen-1.0";
            reg = <0x79000000 0x10000>;
        };
        axi_hdmi_core: axi_hdmi_tx@70e00000 {
            compatible = "xlnx,axi-hdmi-tx-1.0";
            reg = <0x70e00000 0x10000>;
        };
        axi_hdmi_dma: dma@43000000 {
            #dma-cells = <1>;
            compatible = "xlnx,axi-vdma-1.00.a";
            interrupt-parent = <&intc>;
            interrupts = <0 29 4>;
            reg = <0x43000000 0x10000>;
            xlnx,flush-fsync = <0x1>;
            xlnx,num-fstores = <0x3>;
            dma-channel@43000000 {
                compatible = "xlnx,axi-vdma-mm2s-channel";
                interrupts = <0 29 4>;
                xlnx,datawidth = <0x40>;
                xlnx,device-id = <0x0>;
                xlnx,genlock-mode ;
            };
        };
        axi_i2s_adi: axi_i2s_adi@77600000 {
            compatible = "xlnx,axi-i2s-adi-1.0";
            reg = <0x77600000 0x10000>;
        };
        axi_iic_fmc: i2c@41620000 {
            #address-cells = <1>;
            #size-cells = <0>;
            compatible = "xlnx,xps-iic-2.00.a";
            interrupt-parent = <&intc>;
            interrupts = <0 33 4>;
            reg = <0x41620000 0x1000>;
        };
        axi_iic_main: i2c@41600000 {
            #address-cells = <1>;
            #size-cells = <0>;
            compatible =  "xlnx,xps-iic-2.00.a";
            interrupt-parent = <&intc>;
            interrupts = <0 30 4>;
            reg = <0x41600000 0x1000>;

        };
        axi_spdif_tx_core: axi_spdif_tx@75c00000 {
            compatible = "xlnx,axi-spdif-tx-1.0";
            reg = <0x75c00000 0x10000>;
        };
    };
};

(5)system-conf.dtsi

/*
 * CAUTION: This file is automatically generated by PetaLinux SDK.
 * DO NOT modify this file
 */

/include/ "skeleton.dtsi"
/include/ "zynq-7000.dtsi"
/include/ "pcw.dtsi"
/include/ "pl.dtsi"

/ {
    model = "test_project";
    aliases {
        serial0 = &uart1;
        ethernet0 = &gem0;
        spi0 = &qspi;
    };
    chosen {
        bootargs = "console=ttyPS0,115200 earlyprintk";
    };
    memory {
        device_type = "memory";
        reg = <0x0 0x20000000>;
    };
};

&gem0 {
    local-mac-address = [00 0a 35 00 1e 53];
};

&qspi {
    #address-cells = <1>;
    #size-cells = <0>;
    flash0: flash@0 {
        compatible = "micron,n25q128";
        reg = <0x0>;
        #address-cells = <1>;
        #size-cells = <1>;
        spi-max-frequency = <50000000>;
        partition@0x00000000 {
            label = "boot";
            reg = <0x00000000 0x00500000>;
        };
        partition@0x00500000 {
            label = "bootenv";
            reg = <0x00500000 0x00020000>;
        };
        partition@0x00520000 {
            label = "kernel";
            reg = <0x00520000 0x00a80000>;
        };
        partition@0x00fa0000 {
            label = "spare";
            reg = <0x00fa0000 0x00000000>;
        };
    };
};

(6)system-top.dtsi，这个文件默认是空的，没有内容。

/dts-v1/;
/include/ "system-conf.dtsi"
/ {

};

下面进行pl.dtsi设备树文件的修改：

/*
 * CAUTION: This file is automatically generated by Xilinx.
 * Version: HSI 2015.4
 * Today is: Fri Jun 22 10:52:12 2018
*/


/ {
    amba_pl: amba_pl {
        #address-cells = <1>;
        #size-cells = <1>;
        compatible = "simple-bus";
        ranges ;
        axi_hdmi_clkgen: axi_clkgen@79000000 {
            compatible = "xlnx,axi-clkgen-1.0";
            reg = <0x79000000 0x10000>;
        };
        axi_hdmi_core: axi_hdmi_tx@70e00000 {
            compatible = "xlnx,axi-hdmi-tx-1.0";
            reg = <0x70e00000 0x10000>;
        };
        axi_hdmi_dma: dma@43000000 {
            #dma-cells = <1>;
            compatible = "xlnx,axi-vdma-1.00.a";
            interrupt-parent = <&intc>;
            interrupts = <0 29 4>;
            reg = <0x43000000 0x10000>;
            xlnx,flush-fsync = <0x1>;
            xlnx,num-fstores = <0x3>;
            dma-channel@43000000 {
                compatible = "xlnx,axi-vdma-mm2s-channel";
                interrupts = <0 29 4>;
                xlnx,datawidth = <0x40>;
                xlnx,device-id = <0x0>;
                xlnx,genlock-mode ;
            };
        };
        axi_i2s_adi: axi_i2s_adi@77600000 {
            compatible = "xlnx,axi-i2s-adi-1.0";
            reg = <0x77600000 0x10000>;
        };
        axi_iic_fmc: i2c@41620000 {
            #address-cells = <1>;
            #size-cells = <0>;
            compatible = "xlnx,xps-iic-2.00.a";
            interrupt-parent = <&intc>;
            interrupts = <0 33 4>;
            reg = <0x41620000 0x1000>;
        };
        axi_iic_main: i2c@41600000 {
            #address-cells = <1>;
            #size-cells = <0>;
            compatible =  "xlnx,xps-iic-2.00.a";
            interrupt-parent = <&intc>;
            interrupts = <0 58 4>;//30修改成58
            reg = <0x41600000 0x1000>;

            //增加的部分
            adau1761: adau1761@3b {  
                compatible = "adi,adau1761";  
                reg = <0x3b>;  
            };
        };
        axi_spdif_tx_core: axi_spdif_tx@75c00000 {
            compatible = "xlnx,axi-spdif-tx-1.0";
            reg = <0x75c00000 0x10000>;
        };
        //增加的部分
        audio_clock: audio_clock {  
            compatible = "fixed-clock";  
            #clock-cells = <0>;  
            clock-frequency = <12288000>; 
        };
        //增加的部分
        axi_i2s_0: axi-i2s@0x77600000 {  
            compatible = "adi,axi-i2s-1.00.a";  
            reg = <0x77600000 0x1000>;  
            dmas = <&dmac_s 1 &dmac_s 2>;  
            dma-names = "tx", "rx";  
            clocks = <&clkc 15>, <&audio_clock>;  
            clock-names = "axi", "ref"; 
        }; 
        //增加的部分
        zed_sound: zed_sound {  
            compatible = "digilent,zed-sound";  
            audio-codec = <&adau1761>;  
            cpu-dai = <&axi_i2s_0>;  
        };  

    };
};

（1）首先，第一处修改，将
interrupts = <0 30 4>;
修改为：
interrupts = <0 58 4>;
<>括号意思括号内的数是32位无符号数，第一个0是中断的类型，第二个数是中断号，第三个数4是中断的触发方式。
调试记录如下：
这里写图片描述
该参数设置为30，会出现xiic-i2c 41600000.i2c: Controller timed out的错误（将参数调成58，不会出现该错误，可正常加载 ）：
这里写图片描述
为什么默认生成的中断号30不行，加载内核会出错，而修改成58后可正常加载，这部分的原因还没查到，希望知道的朋友可以告知一声。
（2）接着，第二处的修改：在iic内部增加一个adau1761节点，地址是0x3b.

            adau1761: adau1761@3b {  
                compatible = "adi,adau1761";  
                reg = <0x3b>;

地址如下图中：
这里写图片描述
（3）继续修改第3处：增加audio 的时钟节点。

        //增加的部分
        audio_clock: audio_clock {  
            compatible = "fixed-clock";  
            #clock-cells = <0>;  
            clock-frequency = <12288000>; 
        };

（4）继续修改第4处：增加axi-i2s节点。

        //增加的部分
        axi_i2s_0: axi-i2s@0x77600000 {  
            compatible = "adi,axi-i2s-1.00.a";  
            reg = <0x77600000 0x1000>;  
            dmas = <&dmac_s 1 &dmac_s 2>;  
            dma-names = "tx", "rx";  
            clocks = <&clkc 15>, <&audio_clock>;  
            clock-names = "axi", "ref"; 
        };

（5）继续修改第5处：增加zed_sound节点。

        zed_sound: zed_sound {  
            compatible = "digilent,zed-sound";  
            audio-codec = <&adau1761>;  
            cpu-dai = <&axi_i2s_0>;  
        };

具体的相互关系如下图：这里写图片描述
至此，pl设备树文件已修改完成。

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