STM32 timer interrupt

STM32 timer Introduction

STM32 timer into a variety of advanced timers, general-purpose timers, basic timer

The main function Advanced Timer General Purpose Timer Basic Timer
Internal clock source Yes Yes Yes
Count direction Up, down, two-way Up, down, two-way Improvement
External event count Yes Yes no
Four independent channels Yes Yes no

Further three special timers: an independent watchdog timer, the watchdog timer window, the system timer tick (Cortex-MX integrated inside the SysTick timer)

Counting Mode

1. Count Up Mode: CMS is equal to the control register TIMx_CR1 00, DIR = 0 up-count mode is selected. Up-counting mode in the counter counts up to the automatic zero-load value (in TIMx_ARR counter), when the count of the overflow counter generates a time-out period. At the same time generates an update event. UG TIMx_EGR provided bit register, and an update event.
2. Count Down Mode: CMS is equal to the control register TIMx_CR1 00, DIR = 1 down-count mode selected. Down-count mode, the counter starts counting down from the value loaded to 0 (the value of the counter is loaded TIMx_ARR value), then the value loaded from the automatic counting down again, while an update event. UG TIMx_EGR provided bit register, and an update event.
3. The center-aligned mode (up and down count mode): the counter starts counting from 0 to the value -1 is automatically loaded, generates a counter overflow event, then counted down to 1 and generates a counter overflow event; and from 0 start counting again.
In the development of library functions can be selected in the following function selection:

TIM_TimeBaseInitStrue.TIM_CounterMode=TIM_CounterMode_Up;//例如计数模式选择向上计数模式

The use of general-purpose timers process

1. Set interrupt
attention interrupt channel selected according to different timers. Because different timer generates an interrupt request different for different timers should choose a different interrupt channel. code show as below

    NVIC_InitStructure.NVIC_IRQChannel = 
	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 
	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 
	NVIC_InitStructure.NVIC_IRQChannelCmd =
	NVIC_Init(&NVIC_InitStructure);  

2. Timer Interrupt Configuration
STM32F103 advanced control timers using APB2, timers and other basic timer uses APB1 bus. Prescaler counter clock frequency by any value between 1-65536 division. It is based on one (in TIMx_PSC register) 16-bit control register 16-bit counter. Because the control register with the buffer, it can be changed at runtime. The new parameters prescaler next update is adopted when the event comes. When prescale changes from 12:
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When the prescaler becomes 1 from 4:
Here Insert Picture Description

Note: When you need to clear after the completion of the base set interrupt flag bit and interrupt source enable TIM.

   TIM_TimeBaseInitStrue.TIM_ClockDivision=TIM_CKD_DIV1;
   TIM_TimeBaseInitStrue.TIM_CounterMode=TIM_CounterMode_Up;
	  
   TIM_TimeBaseInitStrue.TIM_Period=arr;        //设置自动装载值        
   TIM_TimeBaseInitStrue.TIM_Prescaler=psc;     //设置预分频系数
   TIM_TimeBaseInitStrue.TIM_RepetitionCounter=	  	    
   TIM_TimeBaseInit(TIM3,&TIM_TimeBaseInitStrue);
   TIM_ITConfig(TIM3,TIM_IT_Update,ENABLE);    //清除中断标志位

Interrupt Service Routine:

void TIM3_IRQHandler(void)//该函数原型在启动文件中
{                         
	if(TIM_GetITStatus(TIM3,TIM_IT_Update))
	{
		TIM_ClearITPendingBit(TIM3,TIM_IT_Update); 	//清除定时中断标志	
	}	
}

Related formulas (72MHz system clock is the case):

TIM_Period * (TIM_Prescaler + 1) / 72000000
where the count value TIM_Period, TIM_Prescaler of prescaler

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Origin blog.csdn.net/weixin_44675285/article/details/104251968