One, interrupt introduction
(1) Interruption concept
When the CPU executes the program, due to a certain random event (external or internal), the CPU temporarily interrupts the running program, and then executes a special service program (interrupt service subroutine or interrupt handler) to handle the Event, after the event is processed, it returns to the interrupted program to continue execution. This process is called interruption. The interrupt source is called the interrupt source. For example, if the doorbell rings suddenly while watching TV, the doorbell ringing is equivalent to the interrupt source. Some interrupts can also be interrupted by other high-priority interrupts, so this situation is also called interrupt nesting. When the CPU executes the program, due to a certain random event (external or internal), the CPU temporarily interrupts the running program, and then executes a special service program (interrupt service subroutine or interrupt handler) to handle the Event, after the event is processed, it returns to the interrupted program to continue execution. This process is called interruption. The interrupt source is called the interrupt source. For example, if the doorbell rings suddenly while watching TV, the doorbell ringing is equivalent to the interrupt source. Some interrupts can also be interrupted by other high-priority interrupts, so this situation is also called interrupt nesting.
The STM32F10x chip has 84 interrupt channels, including 16 core interrupts and 68 maskable interrupts. These interrupt channels have been fixedly allocated to the corresponding external devices according to different priority orders. (Refer to "STM32F10x Chinese Reference Manual"-9 Interrupt and Event Chapter), the following table is incomplete
(2) Introduction of NVIC
The full name of NVIC in English is Nested Vectored Interrupt Controller, which means nested vectored interrupt controller in Chinese. It belongs to a peripheral of the M3 core and controls the interrupt-related functions of the chip. Because ARM reserves a lot of functions for NVIC, but companies that use M3 core design chips may not need so many functions, so they need to cut on NVIC. The number of internal interrupts in ST's STM32F103 chip is the result of NVIC cutting.
Interrupt control related registers are in the NVIC structure of the firmware library core_cm3.h file. Can open any library function project to view
(3) Interrupt priority
The STM32F103 chip supports 60 maskable interrupt channels. Each interrupt channel has its own interrupt priority control byte (8 bits, but only 4 bits are used in STM32F103, and the upper 4 bits are valid. The smaller the number, the higher the priority ) , The upper 4 bits used to express the priority are used to form the preemptive priority and the response priority. The response priority is usually called "sub-priority" or "sub-priority". Each interrupt source needs to be Specify these two priorities.
Interrupt events with high preemptive priority will interrupt the current main program or interrupt program operation, commonly known as interrupt nesting. In the case of the same preemptive priority, the interrupt with high response priority is responded to first.
When the preemptive priority levels of the two interrupt sources are the same, the two interrupts will have no nesting relationship. When one interrupt comes, if another interrupt is being processed, the latter interrupt will wait until the previous interrupt is processed. Can be processed. If these two interrupts arrive at the same time, the interrupt controller decides which one to handle first according to their response priority; if their preemptive priority and response priority are both equal, then according to their ranking in the interrupt table The order determines which one is processed first.
The STM32F103 has 4 bits in the register bits that specify the interrupt priority. The grouping of these 4 bits is as follows:
To set the priority group, call the library function NVIC_PriorityGroupConfig(), which can be viewed in misc.c.
Second, interrupt configuration steps
To use interrupt, we need to configure it first, usually through these steps:
(1) Enable an interrupt of the peripheral
(2) Set the interrupt priority group (generally divided into two groups), initialize the NVIC_InitTypeDef structure
typedef struct
{
uint8_t NVIC_IRQChanne1;//中断源
uint8_t NVIC_IRQChannelPreemptionPriority://抢占优先级
uint8_t NVIC_IRQChannelSubPriority;//响应优先级
FunctionalState NVIC_IRQChannelCmd;//中断使能或失能
}NVIC_InitTypeDef;This structure is contained in the misc.c file. When writing the interrupt source, pay attention to the name of the interrupt. Do not write the name of the interrupt. If you write a wrong, the compiler will not report an error, but the program is not available. All are included in the header file stm32f10x.h Interrupt source
stm32f103zet6 interrupt source:
ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */
USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */
USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */
CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */
CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */
EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */
TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */
TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */
TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */
TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */
TIM2_IRQn = 28, /*!< TIM2 global Interrupt */
TIM3_IRQn = 29, /*!< TIM3 global Interrupt */
TIM4_IRQn = 30, /*!< TIM4 global Interrupt */
I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */
I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */
I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */
SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
SPI2_IRQn = 36, /*!< SPI2 global Interrupt */
USART1_IRQn = 37, /*!< USART1 global Interrupt */
USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
TIM8_BRK_IRQn = 43, /*!< TIM8 Break Interrupt */
TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */
TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt */
TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */
ADC3_IRQn = 47, /*!< ADC3 global Interrupt */
FSMC_IRQn = 48, /*!< FSMC global Interrupt */
SDIO_IRQn = 49, /*!< SDIO global Interrupt */
TIM5_IRQn = 50, /*!< TIM5 global Interrupt */
SPI3_IRQn = 51, /*!< SPI3 global Interrupt */
UART4_IRQn = 52, /*!< UART4 global Interrupt */
UART5_IRQn = 53, /*!< UART5 global Interrupt */
TIM6_IRQn = 54, /*!< TIM6 global Interrupt */
TIM7_IRQn = 55, /*!< TIM7 global Interrupt */
DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */
DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */
DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */
DMA2_Channel4_5_IRQn = 59 /*!< DMA2 Channel 4 and Channel 5 global Interrupt */(Three) write interrupt service function
When an interrupt is triggered, an interrupt service function will be executed. Do not modify the interrupt service function name , because it has been fixed in the startup function.
All startup functions are included in the startup_stm32f10x_hd.s file ( do not modify )
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1 & ADC2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
DCD TIM8_BRK_IRQHandler ; TIM8 Break
DCD TIM8_UP_IRQHandler ; TIM8 Update
DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
DCD ADC3_IRQHandler ; ADC3
DCD FSMC_IRQHandler ; FSMC
DCD SDIO_IRQHandler ; SDIO
DCD TIM5_IRQHandler ; TIM5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TIM6_IRQHandler ; TIM6
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5