1. Timer simple classification
1 Advanced control timer TIM8 TIM1
2 . TIM3 TIM4 TIM5 general-purpose timer TIM2
3 . Basic timer TIM6 TIM7
Timer:
. 1 . 16 / 32-bit up and down and down-count mode, the counter automatically reload as TIMx_CNT
2 16-bit programmable (modified in real time) prescaler (TIMx_PSC).
. 3 . 4 independent channels (TIMx_CH1 ~. . 4 )
Input Capture
Output Compare
PWM generation
Single pulse mode
4 ., And an external timer may be set associative
2. Timer structure diagram
Timer block diagram portion 5
Clock generating section
Part timer
Input comparison section
Output compare part
Register part
Clock generating sources:
1 . Internal clock the APB1 (CLK_INT) (*)
2 . TIMx_ETR external input pin
3 . ITRx internal trigger input, the timer set associative
. 4 TL1FP1 /. 2 from the outer channel timer
The main internal clock, the final output [ CK_PSC ]
Time base circuit:
The CK_PSC by [ the PSC prescaler for dividing the frequency [] CK_CNT ] to give a final clock
By [ the CNT counter ] and a count mode for counting, when the end count is triggered [ auto-reload counter ]
Input Capture:
Each general purpose timer input capture has four channels [TIMx_CH1 / 2 / . 3 / . 4 ]
Output compare:
For example, the timer is now from 0 - 100 counts up
If [ the capture compare register set value] to V = 50 ;
If the current value of <v then outputs a high level , the current value of> V output is low
then the effect is 0 - 50 outputs a high level, 50 - 100 outputs a low level, the output channel to achieve
By controlling the value of V can change the duty cycle to achieve PWM.