GPIO_InitTypeDef GPIO_InitStructure; TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; TIM_OCInitTypeDef TIM_OCInitStructure; TIM_BDTRInitTypeDef TIM1_BDTRInitStruct; RCC_APB2PeriphClockCmd (RCC_APB2Periph_TIM1, ENABLE); // RCC_APB2PeriphClockCmd (RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOA, ENABLE); // Enable GPIO peripheral clock is enabled // RCC_APB2PeriphClockCmd (RCC_APB2Periph_AFIO, ENABLE); // multiplexed pins // the pin to be multiplexed output, the output of the PWM pulse waveform TIM1 CH1 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; // TIM_CH1 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; // multiplexed output pull GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(GPIOB, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; // TIM_CH1 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; // multiplexed output pull GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init (with GPIOA, & GPIO_InitStructure); // GPIO_PinRemapConfig (GPIO_PartialRemap_TIM1, the ENABLE); TIM_TimeBaseStructure.TIM_Period = ARR; // set value 80K automatic reload register into the active period of the next update event TIM_TimeBaseStructure.TIM_Prescaler = PSC; // as TIMx provided for frequency division of the clock prescaler value, divide TIM_TimeBaseStructure.TIM_ClockDivision = 0 ; // set the clock division: TDTS = Tck_tim TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; // the TIM counts up mode TIM_TimeBaseInit (TIM1, & TIM_TimeBaseStructure); // according to TIM_TimeBaseInitStruct initialization parameters specified TIMx time base unit ///****** BDTR configuration register configured dead time **************** / /// * @ 20 timer clock 72M TIM_ClockDivision = TIM_CKD_DIV1, Tdts = 13.89 NS @ 21 is 0 - 1.764us algorithm using a @ 22 is 1.778us - 3.505us algorithm with two @ 23 is 3.556us - 7.000us algorithm with three @ 24 7.1117us - 14us algorithm with four // 25 takes longer , using frequency division TIM_ClockDivision // 26 is * / // TIM1_BDTRInitStruct.TIM_OSSRState = TIM_OSSRState_Disable; // TIM1_BDTRInitStruct.TIM_OSSIState = TIM_OSSIState_Disable; // TIM1_BDTRInitStruct.TIM_LOCKLevel = TIM_LOCKLevel_OFF; // = 205 TIM1_BDTRInitStruct.TIM_DeadTime; // dead time 72: 1us 172: 205 3us: 5us // TIM_BDTRConfig (TIM1, & TIM1_BDTRInitStruct); TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2; // Timer mode is selected: TIM pulse width modulation mode 2 TIM_OCInitStructure. = TIM_OutputNState_Enable TIM_OutputNState; // Comparative output enable N TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; TIM_OCInitStructure.TIM_Pulse = 400 ; // set pulse to be loaded into capture compare register value TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low; // output polarity: TIM polarity high output of comparator TIM_OCInitStructure.TIM_OCPolarity = TIM_OCNPolarity_Low; TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset; TIM_OCInitStructure. TIM_OCIdleState = TIM_OCIdleState_Reset; TIM_OC3Init (TIM1, & TIM_OCInitStructure); // The parameters specified TIM_OCInitStruct initializing peripherals TIMx TIM_CtrlPWMOutputs (TIM1, the ENABLE); // a MOE main output enable // TIM_SetCompare4 (TIM8,700); TIM_OC3PreloadConfig (TIM1, TIM_OCPreload_Enable); / / CHl preload enable TIM_ARRPreloadConfig (TIM1, the eNABLE); // enable TIMx ARR in the preload register TIM_Cmd (TIM1, the eNABLE); // enable TIM1
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