#computer architecture # how to design a processor 2

control:

Where there is a conflict of plus input MUX

All control signals emitted by the control

Identify the data stream and each instruction in the MUX and a selection 0or1

Make a truth table

Conversion circuits

ALU controller:

main controller:

 

pipeline:

a pipeline datapath

Instruction execution stage is divided into 5:

 

 

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Origin www.cnblogs.com/zhanghaha-zzz/p/11409167.html