A memory mapping
1. What is a memory map
of memory mapped ARM refers to the storage system, a memory management unit (MMU) maps virtual addresses to actual physical addresses, as shown in FIG.
Address converter [Note] FIG MMU i.e., operation of the CPU called the virtual address of the actual operation of MMU physical address
2, why the memory map
ARM 32-bit address bus, so that CPU addressable address range 0x00000000 ~ 0xffffffff space of 4GB, all internal and external memory or a peripheral unit needs to be operated by the corresponding address, and number of different types of address space are not the same peripheral chip, the core in order to make easier the management of different chip designs, the ARM core will first be given a predefined memory map, as shown in FIG
chip design companies need to predefined kernel memory mapping to define the internal chip peripherals and external interfaces to retain the benefits of doing so is to greatly reduce the hassle of converting between different chip addresses the same core (cpu operating unified virtual address, the actual physical delivery address managed by MMU).
Second, bit operations
1. What is bit operating
cite a simple example, using 51 single operation P1.0 is low we know that behind this is actually a bit to register a 1 or 0 in the writing process, but in process CPU operation corresponding to each address is an 8-bit byte, how to realize direct manipulation of certain one of them, which requires a bit of help with the operation.
2, those address bits that can be operate with
the figure above to achieve a two-bit region. Where a is the lowest range SRAM 1MB region (Bit band region), the second range is the lowest 1MB chip peripheral region. Two zones in addition to the address of the same RAM as a normal use, but they have their own "bit-band alias region", each bit-band alias region to expand into a 32 bit word. Band expansion operation using address bits originally located in bit-band alias region (Bit band Alias), since now directed toward the area with special bits, these addresses can not be expanded in an 8-bit spatial point.
Address three specific calculation register
In ARM address all peripherals are mounted on a substantially APBx AHP or bus, so we tend to use a base address + offset address + structure of the embodiment, the address of a specific peripheral register to quickly clear calculated as follows As shown in FIG.
For example, when we want to operate GPIOA module registers only direct ODR operation GPIO-> ODR to, the actual address of the register has been via a peripheral base address PERIPHA_BASE (predefined kernel address) + AHB1 partial bus address shift (specifically decided chip design) with GPIOA offset address + (specifically decided chip design) + GPIO register module distribution structure is determined.
[Note] When you use a bit function, the variables you want to access must be defined with volatile. Because the C compiler does not know a single bit can have two addresses. By going so volatile, the compiler so that every time a new value is written to the register, and not optimized operation.
