External Structure: Pin - Bus
bus:
1) 16 data bus: transmitting information
2) the address bus 20: address code transmitted
3) the control bus 16: transfer control signal
Internal structure:
Working registers: the addressing information temporary intermediate calculation result of the data register, the address register
ALU ALU: arithmetic processor cores to complete all operations
Controller: Zhihuizhongxin, read completion instruction, the control sequence storage and generation decoded
Member comprising: a program counter, an instruction register, an instruction decoder, the control logic unit, a microprocessor status word, stack pointer
I / O control logic: processing I / O operations
Processor functional structure:
Execution unit EU
Bus interface unit BIU
Execution unit EU: performing a predetermined operation instruction, the main components: the ALU arithmetic logic unit, registers, EU controller, the PSW status word microprocessor, general purpose register set.
Excuse the BIU bus means: complete information transfer between the CPU main store and I / O devices, mainly: the ALU arithmetic logic unit, segment registers, instruction pointer the IP, internal registers, instruction queue registers and bus control circuit,
Microprocessor register organizations
General-purpose registers: a data register (AX, BX, CX, DX), address registers (SI, DI, SP, BP)
Segment registers: code segment register CX, the data segment registers DX, additional segment registers ES, the stack segment register SS
Control register: instruction pointer IP, the microprocessor status word PSW
General-purpose registers:
Four 16-bit data registers
AX Accumulator AHAL
BX often as a base register address register
CX Count Register, cycle
DX for registering data, the I / O instruction port address for indicating DX.
4 16-bit address pointer / index registers
Offset address of the source operand index register SI Source index number of segments
Index register destination operand destination index DI
The segment offset address stack register stack pointer SP in the stack segment saved
BP default segment base pointer address SS, the specified offset address segment base pointer
Segment registers:
The code segment register CS:
Data segment register DS:
Additional segment registers ES:
The stack segment register SS:
Control Register 2:
Instruction pointer IP
Microprocessor status word PSW:
16-bit flag register 9:
CF carry flag
Parity flag PF
Auxiliary carry flag AF
ZF Zero Flag
SF sign flag
OF overflow flag
Bus: transfer data, address and control information common channel between the computer system modules.
Advantages: simplifies hardware design
Simplified system configuration
Easy system expansion
Ease of system updates
Ease of debugging and maintenance