ADC analysis of STM32

In the embedded system, the measured and controlled objects (such as temperature, pressure, flow rate, speed, voltage, etc.) are all continuously changing physical quantities. This continuously changing physical quantity is usually called an analog quantity . When the computer participates in measurement and control, the signal processed by the computer is a digital quantity, and the digital quantity refers to a quantity that is both discrete in time and in numbers . A device that converts analog to digital is called an analog/digital converter (ADC). The result of computer processing is also a digital quantity, which cannot directly control the execution components and needs to be converted into an analog quantity. A device that converts digital to analog is called a digital/analog converter (DAC).

The STM32 12-bit ADC is a successive approximation analog-to-digital converter. It has up to 18 channels and can measure 16 external and 2 internal signal sources. A/D conversion of each channel can be performed in one-shot, continuous, scan or intermittent mode. The result of the ADC can be stored in the 16-bit data register in a left-justified or right-justified manner. (From the STM32 data sheet)
The ADC of STM32 can be understood from the following aspects: technical indicators, conversion principle, working process, and working mode.

technical indicators

1. Resolution: Refers to the sensitivity of the AD converter to the smallest change in the input signal, indicating the analog signal corresponding to the lowest bit of the digital output. Calculation formula: signal range/((2^n)-1). STM32 microcontrollers are 12-bit resolution.
2. Conversion time: the effective time interval from the start of the conversion signal to the end of the conversion signal. The total conversion time of the STM32 ADC is: T CONV = sampling time + 12.5 ADC cycles.
For example: when ADCCLK=14MHz (one cycle time is 1/(14* 10 6 ) s), the sampling time is 1.5 ADC cycles, then T CONV = 1.5 cycles + 12.5 cycles = 14 ADC cycles = 1* 10 -6 s=1μs.
3. Input voltage range : 0~3.3V, conversion result range: 0~4095

Conversion principle

The common AD conversion principle is divided into successive approximation type and double integral type. The difference between the two is:
Successive approximation type: generally composed of a comparator, D/A converter, buffer register and control logic circuit, the conversion time is basically fixed, the conversion accuracy is general, the conversion speed is fast, the power consumption is low, and the anti-interference ability is better Difference.
Double integral type: simple structure, strong anti-interference ability, high precision, few external devices, easy to use, high cost performance, but long conversion time (tens to hundreds of milliseconds); suitable for slow signal changes, low sampling rate requirements, high precision Scenarios with high requirements or severe on-site interference.

The ADC of STM32 is a 12-bit gradual approximation ADC, so the conversion principle of the successive approximation is mainly introduced. Taking ADC0809 as an example to introduce the principle of successive approximation ADC conversion. ADC0809 is an 8-bit successive approximation ADC chip, the structure diagram is as follows.
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As shown in the figure above, it can be divided into three main parts: input, comparison, and output.
The input part is 8-channel input, which channel input is determined by the channel selection address signal (ADDA/ADDB/ADDC), the channel selection address signal is
input to the channel selection switch, and the channel selection switch inputs the corresponding channel signal to the comparison part. ALE is the address latch enable signal, which is active at high level, that is to say, when ALE=1, the input is allowed.
The output part is a parallel output port, and OE is an output enable signal, which is active at high level, that is, when OE=1, the chip outputs the contents of the latch. The function of the latch is to latch the result of the AD conversion, and then output it when the output is allowed, and play the role of storing the conversion result.
The most important part is the comparison part, which consists of comparator, successive approximation register and DAC. The role of the DAC is to provide a reference level. The comparison process is to first clear the successive comparison registers, then set the highest position, and compare the data in the register with the input data. If U o < U i , the bit is saved, and if it is greater than, it is discarded, and then the high position is set again to continue the comparison.

Taking 4-bit AD conversion as an example, the process is as follows:
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If the input is 3.3V. In the first comparison, the highest position is 1. At this time, U o =8V>3.3V is discarded, and the highest position is 0. In the second comparison, the second highest position is 1. At this time, U o =4V>3.3V is discarded. The second highest bit is 0, when the third comparison is made, the second lowest bit is 1, and this bit is reserved for U o =2V<3.3V, and for the fourth comparison, the lowest bit is 1, and this bit is reserved for U o =3V<3.3V bit, the lowest bit is 1, so the final output is 0011. This is a 4-bit AD conversion process, but the 8-bit and 12-bit AD conversion processes are similar to it.

In addition to these three parts, ADC0809 has some other control bits. CLOCK is the clock signal input, and the driver chip can only work with the clock signal; START is the AD conversion enable signal. It can be considered as a conversion trigger signal; EOC is a conversion end signal. After the AD conversion is completed, this bit is 1, indicating that the conversion is completed. V REF(+) and V REF(-) are reference voltages, generally connected to VCC and GND.
STM32 is a 12-bit ADC. Although ADC0809 is an 8-bit AD conversion chip, its conversion process is similar to that of 12-bit. It can be used to understand the 12-bit AD conversion process.

work process

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STM32 microcontroller ADC structure block diagram is shown in the figure, it is mainly divided into several parts: input part, trigger part, conversion part, output part.

ADC channel selection

The ADC of STM32 has 16 multiplexing channels, and the conversion can be divided into two groups: regular channel group and injected channel group. A channel group consists of a series of converted channels.
A regular channel group consists of a maximum of 16 conversion channels, and an injection channel group consists of a maximum of 4 conversion channels. ( ADC1 also includes two internal channel inputs, a total of 18 channel inputs ) The data converted by the ADC is divided into regular channel data registers (1) and injection channel data registers (4). That is to say, the injection group can store 4 converted data at the same time, while the rule group can only store one converted data, so when using the rule group to convert multiple channel data, you can use DMA to move the converted data to other places stored to prevent data from being overwritten . In addition, the conversion of the injection channel can interrupt the conversion of the regular channel. After the injection channel is converted, the regular channel can continue to be converted, similar to interruption.

ADC trigger selection

The ADC part needs to receive the trigger signal to start the conversion. For ADC1 and ADC2, the trigger signal can come from the outside (the regular channel group is EXTI_11, and the injection channel group is EXTI_15), or it can come from the internal timer (related events of TIM1~TIM4), and software trigger can also be used. When using an external trigger signal, only a rising edge can initiate a conversion. For ADC3, the trigger signal comes from the internal timer (related events of TIM1~TIM4, TIM5 and TIM8), or it can be triggered by software.

ADC conversion time

The ADC clock comes from the high-speed peripheral APB2 clock (up to 72MHz). After the ADC prescaler, PCLK2 is divided by 2, 4, 6 and 8 to generate, but the maximum does not exceed 14MHz.
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AD conversion needs to sample the analog signal, keep it for a period of time, then quantize it, and use digital code to represent the signal value. After the ADC part receives the trigger signal, it samples the signal of the input channel under the drive of the ADCCLK clock, and performs analog/digital conversion. Before the ADC starts converting, it needs a period of time to stabilize. After a conversion is initiated, it takes at least 14 clock cycles to complete. At this point, the 16-bit data register holds the conversion result.
The ADC conversion time formula is as follows: T CONV = sampling time + 12.5 ADC cycles

data alignment

Because the ADC of STM32 is a 12-bit ADC, the converted result is 12-bit data, and the data register is 16-bit, so the converted data is aligned in two ways, left-aligned and right-aligned, in the data register. Take the rule group as an example.
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If the data is right-aligned, the upper 4 bits of the data register will be filled with 0.
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If the data is left-aligned, the fourth bit of the data register will be filled with 0.

Analog watchdog

The STM32 ADC can also be configured with an analog watchdog. Its function is to monitor the conversion results of the ADC. If the ADC conversion results have some voltages that exceed the threshold or the voltage is lower than the threshold, it will issue an alarm.

ADC Interrupt

The completion of the conversion of the regular channel and the injection channel can trigger the conversion end event of the ADC. Similar to the ADC0809, the STM32 chip will send a conversion end signal after the conversion is completed. The conversion end signal of the rule group is EOC, and the signal of the injection group is JEOC. Both signals can issue an ADC interrupt request. If an analog watchdog is configured and the collected voltage exceeds the threshold, a watchdog interrupt will be triggered.
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Note: ADC1 and ADC2 interrupts are mapped to the same interrupt vector, and ADC3 is mapped to another interrupt vector.

Operating mode

Commonly used ADC conversion modes can be summarized into the following four types

Single conversion, non-scanning mode

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The conversion process is as shown in the figure above. A single conversion means that the ADC sends an EOC signal after a conversion is completed. After the conversion is completed, a new trigger signal is required to enter the next conversion, and the conversion cannot be performed continuously. Non-scanning means that only one channel's signal is converted in one conversion.

Continuous conversion, non-scanning mode

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The conversion process is shown in the figure above. Continuous conversion means that after a conversion is completed, the ADC sends an EOC signal but does not stop the conversion, but enters the next conversion process. The continuous conversion only needs one trigger to continue the conversion. Non-scanning means that only one channel's signal is converted in one conversion.

Single conversion, scan mode

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The conversion process is as shown in the figure above. The scan mode means that the signals of multiple channels can be converted in one conversion, and the conversion order is in accordance with the order of channel input. A single conversion means that after converting multiple channels, the ADC sends an EOC signal to end the conversion. A new trigger signal is required for the next conversion.

Continuous conversion, scan mode

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The working process is as shown in the figure above. The continuous conversion and scanning mode means that the EOC signal is sent after the conversion of multiple channels is completed in one conversion, but the conversion does not end, but enters the next conversion of multiple channel signals.

Summary of working mode

It can be seen from the above several working modes that the commonly used 4 working modes are composed of 4 sub-modes: single conversion, multiple conversion, scanning mode and non-scanning mode.
The difference between a single conversion and multiple conversions is whether to stop the conversion after one conversion is completed. If the conversion is stopped, it is a single conversion. If the conversion is not stopped and the next conversion is entered, it is a multiple conversion. A single conversion requires a new trigger signal for each conversion, and only one trigger signal is required for multiple conversions.
The difference between scanning mode and non-scanning mode is that several channels can be converted in one conversion. If only one channel can be converted, it is non-scanning mode. If multiple channels can be converted at one time, it is scanning mode.

Summarize

AD conversion is a commonly used part of STM32 applications. After familiarizing with the working process of the 8-bit AD conversion chip, it is analogous to the 12-bit ADC of STM32, so that the ADC of STM32 will look much simpler. The main thing is to understand the conversion process of successive approximation in the conversion process of successive approximation ADC.
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The working block diagram of the STM32 ADC can be summarized as shown in the figure above. After the channel selector is input, it reaches the AD converter for data conversion, and the converted result is input into the data register. The end-of-conversion flag EOC can trigger an ADC interrupt. If an analog watchdog is configured, when the collected voltage exceeds the threshold, a watchdog interrupt will be triggered. There are several sources for triggering transitions. The ADC clock is mounted on the APB2 bus, which can reach a maximum of 14MHz after pre-dividing.

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Origin blog.csdn.net/Tao_9/article/details/130009872