STM32 low power consumption analysis

1. ARM releases the latest kernel

On May 29, 2023, Arm today released processor cores: Cortex-X4, Cortex-A720 and Cortex-A520. These cores are based on the Arm v9.2 architecture, only support 64-bit instruction sets and are no longer compatible with 32-bit applications. Arm said the cores offer significant improvements in performance and efficiency, while also enhancing security and scalability.
Cortex-X4 is Arm's flagship core. This core has an average performance improvement of 15% over last year's Cortex-X3 core, while reducing power consumption by 40% at the same frequency !

ARM's core-based processing has been widely used in various fields, especially in the field of mobile devices, such as mobile phones, tablets, smart watches, POS machines, etc., due to its advantages of high performance and low power consumption .

2. Low power consumption applications

With the rapid development of computer technology and microelectronics technology, the application fields of computer systems are becoming more and more extensive. In some specific scenarios, the application of low-power computers is particularly important . Such as in fields such as smartphones, medical equipment and industrial control. Since these areas have high requirements on device size, weight and/or durability, low-power technologies are widely used in these areas.

The main low-power applications of computers include the following:
IoT devices : IoT devices need to run for a long time, so low-power computers are required to ensure that the device does not run out of power quickly during operation.

Embedded System : An embedded system is a small computer system used to control or monitor a specific device or system. These systems need to run for long periods of time, requiring the use of low-power computers to ensure that the system does not fail due to running out of power.

Mobile devices : Mobile devices such as smartphones, tablets, etc. need to be used for long periods of time, so a low-power computer is required to ensure that the device does not overheat or run out of power quickly.

Cloud Data Center : Cloud data centers require large amounts of computer resources to support a large number of users and applications. These computers need to run for a long time, so low-power computers are required to ensure that power consumption is effectively controlled.
All in all, low-power computers are becoming more and more widely used, and these computers use a series of innovative technologies to minimize power consumption while still ensuring high-performance operation . The application of these technologies is not only beneficial to energy conservation and emission reduction, but can also improve the performance and reliability of equipment and promote the continuous development of computer technology.

3.How to reduce power consumption

How does the processor achieve low power consumption? Regarding this question, I will not answer it for now. Let me give an example from life to illustrate the problem from the side.

Assume that a person lives in a house (this house has 1 master bedroom, 3 secondary bedrooms, 1 living room, and 1 kitchen). Assume that the lights in every room in the house are on. How can I save electricity?

The answer is simple. You can turn off the lights in the three unoccupied secondary bedrooms, which will reduce power consumption.

What should you do if you still want to continue saving power? Is it possible to turn off the lights in the living room and kitchen, and then sleep alone in the master bedroom? Does this reduce power consumption?

What should you do if you still want to continue saving power? Is it possible to turn off the light in the master bedroom as well? So it doesn’t consume electricity?

Therefore, if you want to save electricity in your life, you only need to turn off unused or unimportant electrical appliances.

4. Principle of low power consumption of processor

In daily life, power can be saved by turning off electrical appliances. In the same way, processors can also reduce power consumption through this method. A processor is composed of many components, and the power supply system of some components is independent. Power consumption can be reduced by turning off the voltage of components inside the processor .

Let's take the STM32F1 series processor as an example . The operating voltage (VDD) of STM32 is 2.0~3.6V. The required 1.8V power supply is provided through the built-in voltage regulator. When the main power supply VDD is powered off, power is provided for the real-time clock (RTC) and backup register through the VBAT pin. The power supply block diagram is as follows: According to the STM32 power supply block diagram, it is not difficult to find that the

STM32 The power system can be divided into 3 parts:

1. VDDA power supply area.
2. VDD power supply area, which contains an important 1.8V power supply area.
3. Backup power supply area.

4.1.VDDA power supply area

The ADC circuit module of the STM32 processor is equipped with an independent power supply. This power supply is the VDDA power supply. This circuit design facilitates filtering of the ADC power supply alone. The VDDA power supply area uses the VDDA pin input, uses VSSA as an independent ground connection, and the VREF pin provides the reference voltage for ADC measurement.

4.2.VDD power supply area

The VDD power supply domain is the most important part of the power supply system of the STM32 processor, and the circuit powered by the voltage regulator is the core of the VDD power supply domain. The voltage regulator powers all digital circuits except the backup domain and standby circuitry , including the core, digital peripherals (USART, TIMER, GPIO, etc.), RAM, and FLASH.
The output voltage of the voltage regulator is about 1.8V, so these areas of the circuit powered by the voltage regulator are called 1.8V domains. The voltage regulator can operate in run mode, stop mode and standby mode .

In run mode, the 1.8V domain operates at full power.

In stop mode, the 1.8V domain runs in a low-power state,
all clocks in the 1.8V domain are turned off, and the corresponding peripherals stop working, but it will retain the contents of the core registers and SRAM.

In standby mode, the entire 1.8V domain is powered off, and the core registers and SRAM contents in this area are lost.

4.3. Backup power supply area

The backup power supply area includes RTC, RTC BDCR register, LSE oscillator and backup register. The backup power supply area is powered by the VBAT pin. Use a battery or other power source to connect to the VBAT pin. When VDD is powered off, the contents and maintenance of the backup register can be saved. RTC function.

5. Low power consumption mode of STM32 series processors

After reset, the microcontroller is in a running state. A variety of low-power modes are available to save power when the microcontroller is no longer required to run. The STM32F1 series processors have three low-power modes :

1. Sleep mode
2. Stop mode
3. Standby mode

The functional block diagrams of these three low-power modes are as follows:

5.1. Sleep mode

When Cortex-M3 encounters a WFE (wait for interrupt) or WFI (wait for event) instruction, it will stop the core clock and stop program execution . Although the Cortex-M3 core stops working, other peripherals in the processor continue to work. Until a peripheral generates an event or interrupts, the core will be awakened, exit sleep mode, and the program will continue to run (the program will pause when entering sleep and continue to run when exiting sleep). In sleep mode, all I/O pins maintain their status in run mode.

In sleep mode, the core stops working, and other peripherals continue to work. The specific situation is as follows:
Stop : crotex-m core.
Turn on : RAM memory, FLASH memory, digital peripherals (USART, TIMER, GPIO, etc.), standby circuit, voltage regulator.
Sleep mode is the highest of the three low power modes! The power consumption data of sleep mode is as follows :

Entering sleep mode

Enter the sleep state by executing the WFI or WFE instruction. Depending on the value of the SLEEPONEXIT bit in the Cortex-M3 system control register, there are two options for selecting the sleep mode entry mechanism: SLEEP-NOW:
If the SLEEPONEXIT bit is cleared, the microcontroller immediately goes to sleep when WRI or WFE is executed. model.
SLEEP-ON-EXIT: If the SLEEPONEXIT bit is set, the microcontroller immediately enters sleep mode when the system exits from the lowest priority interrupt handler.

Exit sleep mode

If the WFI instruction is executed to enter sleep mode, any peripheral interrupt responded by the nested vector interrupt controller can wake the system from sleep mode.
If the WFE instruction is executed to enter sleep mode, the microprocessor will exit from sleep mode once a wake-up event occurs. A wake-up event can be generated by
enabling an interrupt in the peripheral control register other than the NVIC (Nested Vectored Interrupt Controller) and enabling the SEVONPEND bit in the Cortex-M3 system control register. When the MCU wakes up from WFE, the peripheral's interrupt pending bit and the peripheral's NVIC interrupt channel pending bit (in the NVIC interrupt clear pending register) must be cleared.
Configure an external or internal EXIT line for event mode. When the MCU wakes up from WFE, because the pending bit corresponding to the event line is not set, it is not necessary to clear the peripheral's interrupt pending bit or the peripheral's NVIC interrupt channel pending bit.
This mode requires the shortest time to wake up because no time is lost in interrupt entry or exit.

The code to enter sleep mode is as follows :

void main（）
{
    
    
Init();
while(1)
{
    
    
    if(GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_1) == 0)
    {
    
    
        LED = 0;
        __WFI(); //*进入睡眠模式         
		LED = 1;
    }
}

When a peripheral generates an event or interrupt, the core will be awakened and exit sleep mode .

5.2. Stop mode

The stop mode is based on the deep sleep mode of Cortex™-M3 and combined with the peripheral clock control mechanism. In the stop mode, the voltage regulator can run in normal or low power consumption mode. At this time, all clocks in the 1.8V power supply area are stopped, the functions of the PLL, HSI and HSE RC oscillators are disabled, and the SRAM and register contents are retained.
When entering stop mode, the core clock is stopped, stopping program execution . When an interrupt or wake-up event occurs, the core will be awakened, exit stop mode, and the program will continue to run .
In stop mode, all I/O pins maintain their status in run mode.

In stop mode, the core stops working and the peripherals also stop working. The specific situation is as follows:
Stopped : crotex-m core, digital peripherals (USART, TIMER, GPIO, etc.), FLASH memory
turned on : RAM memory, standby circuit, voltage regulator.

Stop mode is the second of the three low power modes! The power consumption data of stop mode is as follows :
Regarding how to enter stop mode and how to exit stop mode, see the table below for details:

The code to enter stop mode is as follows :

void main（）
{
    
    
while(1)
{
    
    
    if(GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_1) == 0)
    {
    
    
        LED1 = 0;
        RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
        PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
        LED1 = 1;
    }
}

5.3.Standby mode

Standby mode enables the lowest power consumption of the system. This mode turns off the voltage regulator during Cortex-M3 deep sleep mode. The entire 1.8V supply area is powered down, as are the PLL, HSI and HSE oscillators . SRAM and register contents are lost. Only the standby circuit maintains power (the backup circuit can be powered by a battery). In standby mode, all I/O pins are in a high-impedance state.

In stop mode, except for the standby circuit, other circuits stop working. These stopped circuits include: core, digital peripherals, RAM memory and FLASH memory. Except for the specific conditions as follows: Stop: crotex-m core, digital peripherals (
USART , TIMER, GPIO, etc.), FLASH memory, RAM memory, voltage regulator.
On : standby circuit.

The power consumption in standby mode is the lowest among the three low-power modes! The power consumption data of standby mode is as follows :

Regarding how to enter standby mode and how to exit standby mode, see the following table for details:

when an external reset (NRST pin), IWDG reset, rising edge on WKUP pin or RTC alarm event When the edge occurs, the microcontroller exits from standby mode. After waking up from standby, all registers are reset except the power control/status register (PWR_CSR). Code execution after waking from standby mode is equivalent to execution after reset .

The code to enter standby mode is as follows :

void main（）
{
    
    
Init();
while(1)
{
    
    
    if(GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_1) == 0)
    {
    
    
        LED = 0;
    	RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);    			  
    	PWR_WakeUpPinCmd(ENABLE);
    	PWR_ClearFlag(PWR_FLAG_WU);
    	PWR_EnterSTANDBYMode();
		LED = 1;
    }
}

6. In-depth research

Through the first few sections of the article, you may already have a certain understanding of STM32 low power consumption, and most engineers have reached this level. There are two questions here:

1. The kernel is shut down (stops working) in stop mode. Why can the kernel continue to run programs after being awakened?

2. The kernel is also shut down in standby mode. Why can’t I continue running the program even after waking up?

Question 1
Why can the program continue to run after the kernel wakes up in stop mode? Consult the STM official manual on this issue.

It can be seen from the manual that although the core is stopped, the registers and SRAM memory are always in a saved state . After the core wakes up, the data in the registers and SRAM memory are the same as before stopping, so the processor can continue running from the interrupted program. The power block diagram of stop mode is as follows:

Question 2
: Why does it not continue to run after waking up from standby? Continue to consult the official manual of STM.

The manual clearly states that when the 1.8V area is powered off in standby mode (the core is powered off), the data in the registers and SRAM are lost, and only the backup circuit and standby wake-up circuit are powered . The power block diagram of standby mode is as follows:
When entering standby mode, all data in the registers and SRAM are lost. If the CORTEX-M core is forcibly run at this time, there will only be a serious situation where the program runs away. Therefore, STMicroelectronics designed the STM32 processor so that after being awakened from standby, it is equivalent to performing a reset operation, the core is reset, and the program is re-run .

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