1. ADC is a 12-bit successive analog-to-digital converter, so it can only be stored in a 16-bit data register during storage, and cannot be lower than 12 bits. There are 16 external signal sources (ADCx_IN0--ADCx_IN15) and 2 internal signal sources (temperature sensor,)
2.ADC clock - provided by the clock controller ADCCLK clock (RCC_CFGR ADC clock divider register setting) and PCLK2 (APB2 clock ) synchronization.
3. Each channel can be sampled at different times.
The total conversion time is calculated as follows:
T CONV = sampling time + 12.5 cycles
When ADCCLK = 14MHz , the sampling time is 1.5 cycles T CONV = 1.5 + 12.5 = 14 cycles = 1μs
4. Conversion can be triggered by external events ( eg timer capture, EXTI line ) . If the EXTRIG control bit is set , an external event can trigger a conversion.
5. ADC register
(1) ADC_CR2 control register
| Bit 23 bit 22 bit 20 |
TSVREFE : temperature sensor and VREFINT enable SWSTART : start conversion regular channel EXTRIG : external trigger conversion mode of regular channel |
| Bits 19:17 EXTSEL [2: 0] : Select external events that initiate conversion of regular channel groups | |
| Bit 11 bit 3 bit 2 bit 1 bit 0 |
ALIGN : data alignment RSTCAL : reset calibration (Reset calibration) CAL : A / D calibration (A / D Calibration) CONT : continuous conversion ADON : on / off A / D converter |
(2) The sampling time register ADC_SMPRx --1,2 is channel 1 and channel 2, respectively.
(3) ADC rule sequence register ADC_SQRx--Find the data manual: Set the number of channel conversions: Bits 23:20 of ADC_SQR1, set the number of conversions in the conversion sequence: ADC_SQR1-ADC_SQR3
| L [3: 0] : Regular channel sequence length (Regular channel sequence length) These bits are defined by the software as the number of channels in the regular channel conversion sequence. 0000 : 1 conversion 0001 : 2 conversions ... 1111 : 16 conversions |
6. The general configuration process of ADC:
1 ) Turn on the PA port clock and set PA3 as the analog input.
STM32F103R8T6 the ADC1 channel 3 in PA3 on, therefore, we need to enable PORTA clock, then
after setting PA3 as an analog input.
2 ) Enable the ADC1 clock and set the division factor. Set the frequency division factor of ADC1
through the CFGR register of RCC . The division factor should ensure that the ADC1 clock ( ADCCLK ) does not exceed 14Mhz .
（1）RCC->APB2ENR （2）RCC->CFGR
3 ) Set the working mode of ADC1 .
Set independent mode, close scan (use scan), single (continuous) conversion mode, data alignment
(left alignment), trigger mode selection (external trigger - software trigger), etc. are all achieved in this step.
ADCx-> CR1 and ADCx-> CR2
4 ) Set the related information of ADC1 regular sequence.
We only have one channel here, so set the number of channels in the regular sequence to 1: ADC1-> SQR1 Set the conversion sequence of the regular sequence: ADCx-> SQRx
// *******-3 channels, convert 3
ADC1-> SQR1 | = (2 << 20);
// ******* IN3 channel 3 is placed first in the rule group Conversion, 2--2,1--3
ADC1-> SQR3 | = (3 << 0); // 3--channel number
ADC1-> SQR3 | = (2 << 5); // 2--channel Number
ADC1-> SQR3 | = (1 << 10); // 1--channel number
Then set the sampling period of ADC1 channel 3 : ADCx-> SMPRx
5 ) Turn on the AD converter and calibrate.
Turn on the AD converter, reset the calibration, wait for the end of the reset, start the calibration, and wait for the end of the calibration ( controlled by the
ADC_CR2 register). : ADCx-> CR2
// Reset calibration
ADC1-> CR2 | = (1 << 3);
// Wait for the calibration register to be initialized
while (ADC1-> CR2 & (1 << 3)); // Initial calibration is completed, automatically 0, exit whiile
// A / D calibration
ADC1-> CR2 | = (1 << 2);
// wait for the calibration to complete
while (ADC1-> CR2 & (1 << 2));
6 ) Read the ADC value.
Start ADC conversion: ADC1-> CR2 | = (1 << 22) After the conversion is completed, read the value in ADC1_DR
void GZ_ADCValue (void)
{
#if reg_progream
u16 gz_value; // The value of the light
// Start the regular channel conversion
ADC1-> CR2 | = (1 << 22);
// Wait for the conversion to complete
while ((ADC1-> SR & ( 1 << 1)) == 0);
gz_value = ADC1-> DR;
printf ("gz_value =% d \ r \ n", gz_value);
}