NXP i.MX 8M Mini Industrial Core Board Hardware Manual (Quad-core ARM Cortex-A53 + Single-core ARM Cortex-M4, main frequency 1.6GHz)

1 hardware resources

Chuanglong Technology SOM-TLIMX8 is a high-end industrial-grade core board based on NXP i.MX 8M Mini quad-core ARM Cortex-A53 + single-core ARM Cortex-M4 heterogeneous multi-core processor design, ARM Cortex-A53 (64- bit) The main processing unit has a main frequency of up to 1.6GHz, and the ARM Cortex-M4 real-time processing unit has a main frequency of up to 400MHz. The processor adopts the latest 14nm technology, supports 1080P60 H.264 video hardware codec, 1080P60 H.265 video hardware decoding, and GPU graphics accelerator. The core board leads to interfaces such as MIPI-CSI, MIPI-DSI, Audio, PCIe, FlexSPI, USB, UART, Gigabit Ethernet port through stamp hole connection, and can communicate with FPGA at high speed through PCIe, FlexSPI, MIPI-CSI interface. The core board has been verified by professional PCB layout and high and low temperature tests. It is stable and reliable, and can meet various industrial application environments.

Figure 1 Core board hardware block diagram

 

figure 2

image 3

1.1    CPU

The CPU model of the core board is MIMX8MM6CVTKZAA, packaged in LFBGA, the working temperature is -40°C~105°C, the number of pins is 486, the size is 14mm*14mm, and the manufacturing process is 14nm.

NXP i.MX 8M Mini processor architecture is as follows:

Table 1

NXP i.MX 8M Mini Quad

4x ARM Cortex-A53(64-bit), main frequency 1.6GHz, support floating point operation function

ARM Cortex-M4, dedicated real-time processing unit, main frequency 400MHz

1080P60 H.264 Encoder

1080P60 H.264 Decoder

1080P60 H.265 Decoder

GPU: GC320 2D, GCNanoUltra 3D graphics accelerator, support OpenGL ES 1.1/2.0, OpenVG 1.1

 

Figure 4 Functional block diagram of NXP i.MX 8M Mini processor

1.2    ROM

The core board is connected to the eMMC through the MMC1 bus, using an 8bit data line. The eMMC model is compatible with Micron’s MTFC8GAKAJCN-4M IT (8GByte), SAMSUNG’s KLM8G1GEUF-B04% (8GByte), and SkyHigh Memory’s S40FC004 (4GByte).

1.3    RAM

The core board is connected to 2 pieces of DDR4 through a dedicated DRAM bus, each using a 16-bit data line, a total of 32 bits. The DDR4 model is compatible with Micron’s MT40A512M16LY-062E IT (1GByte), SK Hynix Inc’s H5AN8G6NCJR-VKI (1GByte) and H5AN4G6NBJR-VKI (512MByte), and UniIC’s SCB12Q4G160AF-07QI (512MByte), support DDR4-2400 working mode (1200MHz).

1.4 crystal oscillator

The core board uses two industrial-grade crystal oscillators Y1 and Y2, of which the clock frequency of Y1 is 24MHz and the accuracy is ±20ppm, which provides the system clock source for the CPU; the clock frequency of Y2 is 32.768KHz, and the accuracy is ±20ppm, which provides the clock source for the internal RTC of the CPU .

1.5 power supply

The core board adopts a dedicated industrial-grade PMIC power management chip, which meets the power supply requirements of the system and the timing requirements of CPU power-on and power-off, and uses 5V DC power supply for power supply.

1.6    LED

There are three LEDs on the core board. Among them, LED0 is the power indicator light, which will be on by default after the system is powered on. LED1 and LED2 are user-programmable indicator lights, which correspond to GPIO1[0] and GPIO1[1] pins respectively, and light up at high level.

 

Figure 5

 

Figure 6

1.7 Peripheral resources

The main peripheral resources and performance parameters derived from the core board are shown in the table below.

Table 2

Peripheral resources

quantity

performance parameters

Camera

1

MIPI-CSI(Camera Serial Interface),4-lane;

Each lane supports a maximum transmission rate of 1.5Gbps;

Display

1

MIPI-DSI(Display Serial Interface),4-lane;

Each lane supports a maximum transmission rate of 1.5Gbps;

UART

4

The highest supported baud rate is 4Mbps;

Support hardware or software flow control;

SAI

5

Supports full-duplex serial interfaces with frame synchronization, such as I2S, AC97, TDM;

ECSPI

3

Full-duplex enhanced synchronous serial interface;

Supports up to 52Mb/s data rate;

FlexSPI

1

Support single pad/dual pad/quad pad operation mode;

Support DMA;

2C

4

Supports up to 400Kb/s communication rate;

Ethernet

1

Adopt RGMII interface;

Support 10/100/1000M network port configuration;

Support network self-adaptation;

PCIe

1

Support single-lane Gen2 standard port;

Support RC or EP mode;

The highest communication rate is 5Gbps;

USB 2.0

2

Support OTG mode;

Support High-Speed/Full-Speed/Low-Speed ​​mode;

MMC/SD/SDIO

2

MMC1, MMC3 support SD3.0/SDIO3.0/MMC5.1 specification, support 1, 4, 8-bit MMC mode;

MMC2 supports SD3.0/SDIO3.0, supports 1, 4 bit MMC mode;

Support up to 200MHz clock;

Remarks: The eMMC device on the core board has used MMC1, and it has not been led to the stamp hole;

PDM

1

Maximum support for 4 lines and 8 channels;

PWM

4

With 16-bit time base counter;

Support up to 66MHz working frequency;

Watchdog

3

watchdog timer;

The support time setting range is 0.5 ~ 128s;

The time resolution is 0.5s;

S/PDIF

1

Digital audio transmission interface;

Support sending and receiving function, standard audio file transmission format;

JTAG

1

Support boundary scan;

Support IEEE 1149.1 and IEEE 1149.6;

Temperature Sensor

1

Support the sensing temperature range of 10 ~ 105 degrees Celsius;

Sensing resolution is 1 degree Celsius;

Some peripheral resources have pin multiplexing. During the actual development process, you can use the Config Tools for i.MX tool in the "4-Software Documentation\Tools\Windows\" directory of the product documentation to reasonably allocate peripheral resources. Official reference link of Config Tools for i.MX tools: www.nxp.com/design/designs/config-tools-for-i-mx-applications-processors:CONFIG-TOOLS-IMX .

2          引脚说明

2.1    引脚排列

核心板邮票孔引脚采用2x 40pin + 2x 60pin,共200pin规格,引脚排列如下图所示。

 

图 7 核心板引脚排列示意图

2.2    引脚定义

核心板引脚定义如下表。

其中“邮票孔引脚号”为核心板邮票孔引脚序列号,“芯片引脚号”为CPU引脚序列号,“引脚信号名称”为CPU引脚信号名称,“引脚功能”为核心板引脚推荐功能描述。

引脚信号名称中,如包含“PU”、“PD”和“Z”,则分别指该引脚在核心板内部已进行上拉、已进行下拉、已串联电阻。请勿改变“PU”、“PD”引脚的上下拉状态,否则将可能导致核心板部分功能异常。

2.2.1            CON1A

表 3

邮票孔引脚号

芯片引脚号

引脚信号名称

引脚功能

参考电平

1

AD10

AD10/GPIO1_10/USB1_OTG_ID

GPIO

1.8V

2

AD13

AD13/SAI5_RX_DATA2/SAI1_TX_DATA4/SAI1_TX_SYNC/SAI5_TX_BCLK/PDM_BIT_STREAM2/GPIO3_23

PDM

3.3V

3

AC13

AC13/SAI5_RX_DATA3/SAI1_TX_DATA5/SAI1_TX_SYNC/SAI5_TX_DATA0/PDM_BIT_STREAM3/GPIO3_24

PDM

3.3V

4

AC14

AC14/SAI5_RX_DATA1/SAI1_TX_DATA3/SAI1_TX_SYNC/SAI5_TX_SYNC/PDM_BIT_STREAM1/GPIO3_22

PDM

3.3V

5

AB15

AB15/SAI5_RX_SYNC/SAI1_TX_DATA0/GPIO3_19

GPIO

3.3V

6

AC15

AC15/SAI5_RX_BCLK/SAI1_TX_DATA1/PDM_CLK/GPIO3_20

PDM

3.3V

7

AD15

AD15/SAI5_MCLK/SAI1_TX_BCLK/GPIO3_25

GPIO

3.3V

8

AD18

AD18/SAI5_RX_DATA0/SAI1_TX_DATA2/PDM_BIT_STREAM0/GPIO3_21

PDM

3.3V

9

AF8

AF8/SPDIF1_EXT_CLK/PWM1_OUT/GPIO5_5

PWM

3.3V

10

AG9

AG9/SPDIF1_IN/PWM2_OUT/GPIO5_4

GPIO

3.3V

11

AF9

AF9/SPDIF1_OUT/PWM3_OUT/GPIO5_3

GPIO

3.3V

12

-

GND

GND

GND

13

AF16

AF16/SAI1_RX_BCLK/SAI5_RX_BCLK/CORESIGHT_TRACE_CTL/GPIO4_1

GPIO

3.3V

14

AG16

AG16/SAI1_RX_SYNC/SAI5_RX_SYNC/CORESIGHT_TRACE_CLK/GPIO4_0

GPIO

3.3V

15

AG15

AG15/SAI1_RX_DATA0/SAI5_RX_DATA0/SAI1_TX_DATA1/PDM_BIT_STREAM0/CORESIGHT_TRACE0/GPIO4_2/BOOT_CFG0

BOOT_CFG

/GPIO

3.3V

16

AF15

AF15/SAI1_RX_DATA1/SAI5_RX_DATA1/PDM_BIT_STREAM1/CORESIGHT_TRACE1/GPIO4_3/BOOT_CFG1

BOOT_CFG

/GPIO

3.3V

17

AG17

AG17/SAI1_RX_DATA2/SAI5_RX_DATA2/PDM_BIT_STREAM2/CORESIGHT_TRACE2/GPIO4_4/BOOT_CFG2

BOOT_CFG

/GPIO

3.3V

18

AF17

AF17/SAI1_RX_DATA3/SAI5_RX_DATA3/PDM_BIT_STREAM3/CORESIGHT_TRACE3/GPIO4_5/BOOT_CFG3

BOOT_CFG

/GPIO

3.3V

19

AG18

AG18/SAI1_RX_DATA4/SAI6_TX_BCLK/SAI6_RX_BCLK/CORESIGHT_TRACE4/GPIO4_6/BOOT_CFG4

BOOT_CFG

/GPIO

3.3V

20

AF18

AF18/SAI1_RX_DATA5/SAI6_TX_DATA0/SAI6_RX_DATA0/SAI1_RX_SYNC/CORESIGHT_TRACE5/GPIO4_7/BOOT_CFG5

BOOT_CFG

/GPIO

3.3V

21

AG19

AG19/SAI1_RX_DATA6/SAI6_TX_SYNC/SAI6_RX_SYNC/CORESIGHT_TRACE6/GPIO4_8/BOOT_CFG6

BOOT_CFG

/GPIO

3.3V

22

AF19

AF19/SAI1_RX_DATA7/SAI6_MCLK/SAI1_TX_SYNC/SAI1_TX_DATA4/CORESIGHT_TRACE7/GPIO4_9/BOOT_CFG7

BOOT_CFG

/GPIO

3.3V

23

AB18

AB18/SAI1_MCLK/SAI5_MCLK/SAI1_TX_BCLK/PDM_CLK/GPIO4_20

GPIO

3.3V

24

AC18

AC18/SAI1_TX_BCLK/SAI5_TX_BCLK/CORESIGHT_EVENTI/GPIO4_11

GPIO

3.3V

25

AB19

AB19/SAI1_TX_SYNC/SAI5_TX_SYNC/CORESIGHT_EVENTO/GPIO4_10

GPIO

3.3V

26

AG20

AG20/SAI1_TX_DATA0/SAI5_TX_DATA0/CORESIGHT_TRACE8/GPIO4_12/BOOT_CFG8

BOOT_CFG

/GPIO

3.3V

27

AF20

AF20/SAI1_TX_DATA1/SAI5_TX_DATA1/CORESIGHT_TRACE9/GPIO4_13/BOOT_CFG9

BOOT_CFG

/GPIO

3.3V

28

AG21

AG21/SAI1_TX_DATA2/SAI5_TX_DATA2/CORESIGHT_TRACE10/GPIO4_14/BOOT_CFG10

BOOT_CFG

/GPIO

3.3V

29

AF21

AF21/SAI1_TX_DATA3/SAI5_TX_DATA3/CORESIGHT_TRACE11/GPIO4_15/BOOT_CFG11

BOOT_CFG

/GPIO

3.3V

30

AG22

AG22/SAI1_TX_DATA4/SAI6_RX_BCLK/SAI6_TX_BCLK/CORESIGHT_TRACE12/GPIO4_16/BOOT_CFG12

BOOT_CFG

/GPIO

3.3V

31

AF22

AF22/SAI1_TX_DATA5/SAI6_RX_DATA0/SAI6_TX_DATA/0CORESIGHT_TRACE13/GPIO4_17/BOOT_CFG13

BOOT_CFG

/GPIO

3.3V

32

AG23

AG23/SAI1_TX_DATA6/SAI6_RX_SYNC/SAI6_TX_SYNC/CORESIGHT_TRACE14/GPIO4_18/BOOT_CFG14

BOOT_CFG

/GPIO

3.3V

33

AF23

AF23/SAI1_TX_DATA7/SAI6_MCLK/PDM_CLK/CORESIGHT_TRACE15/GPIO4_19/BOOT_CFG15

BOOT_CFG

/GPIO

3.3V

34

G26

G26/BOOT_MODE0

BOOT_MODE

1.8V

35

G27

G27/BOOT_MODE1

BOOT_MODE

1.8V

36

D26

D26/TEST_MODE/PD/Z

BOOT_MODE

1.8V

37

C27

C27/JTAG_TRST_B

BOOT_MODE

1.8V

38

-

GND

GND

GND

39

AD19

AD19/SAI2_MCLK/SAI5_MCLK/GPIO4_27

GPIO

3.3V

40

AD22

AD22/SAI2_TX_BCLK/SAI5_TX_DATA2/GPIO4_25

GPIO

3.3V

41

AC22

AC22/SAI2_TX_DATA0/SAI5_TX_DATA3/GPIO4_26

GPIO

3.3V

42

AD23

AD23/SAI2_TX_SYNC/SAI5_TX_DATA1/SAI2_TX_DATA1/UART1_CTS_B/GPIO4_24

GPIO

3.3V

43

AC24

AC24/SAI2_RX_DATA0/SAI5_TX_DATA0/UART1_RTS_B/GPIO4_23

GPIO

3.3V

44

AC19

AC19/SAI2_RX_SYNC/SAI5_TX_SYNC/SAI5_TX_DATA1/SAI2_RX_DATA1/UART1_TX/GPIO4_21

GPIO

3.3V

45

AB22

AB22/SAI2_RX_BCLK/SAI5_TX_BCLK/UART1_RX/GPIO4_22

GPIO

3.3V

46

-

GND

GND

GND

47

AF24

AF24/ENET1_RGMII_TX_CTL/GPIO1_22

RGMII

1.8/2.5V

48

AG24

AG24/ENET1_RGMII_TXC/ENET1_TX_ER/GPIO1_23

RGMII

1.8/2.5V

49

AG26

AG26/ENET1_RGMII_TD0/GPIO1_21

RGMII

1.8/2.5V

50

AF26

AF26/ENET1_RGMII_TD1/GPIO1_20

RGMII

1.8/2.5V

51

AG25

AG25/ENET1_RGMII_TD2/ENET1_TX_CLK/ENET_REF_CLK_ROOT/GPIO1_19

RGMII

1.8/2.5V

52

AF25

AF25/ENET1_RGMII_TD3/GPIO1_18

RGMII

1.8/2.5V

53

AF27

AF27/ENET1_RGMII_RX_CTL/GPIO1_24

RGMII

1.8/2.5V

54

AE26

AE26/ENET1_RGMII_RXC/ENET1_RX_ER/GPIO1_25

RGMII

1.8/2.5V

55

AE27

AE27/ENET1_RGMII_RD0/GPIO1_26

RGMII

1.8/2.5V

56

AD27

AD27/ENET1_RGMII_RD1/GPIO1_27

RGMII

1.8/2.5V

57

AD26

AD26/ENET1_RGMII_RD2/GPIO1_28

RGMII

1.8/2.5V

58

AC26

AC26/ENET1_RGMII_RD3/GPIO1_29

RGMII

1.8/2.5V

59

AC27

AC27/ENET1_MDC/GPIO1_16

MDIO

1.8/2.5V

60

AB27

AB27/ENET1_MDIO/GPIO1_17

MDIO

1.8/2.5V

2.2.2            CON1B

表 4

邮票孔引脚号

芯片引脚号

引脚信号名称

引脚功能

参考电平

61

-

GND

GND

GND

62

-

VDD_5V_SOM

5V Power Input

5V

63

-

VDD_5V_SOM

5V Power Input

5V

64

-

VDD_5V_SOM

5V Power Input

5V

65

-

VDD_5V_SOM

5V Power Input

5V

66

-

GND

GND

GND

67

-

GND

GND

GND

68

-

VDD_ENET_ADJ

2.5V/1.8V Power Input

1.8V/2.5V

69

-

VDD_3V3_SWOUT

3.3V Power Output

3.3V

70

-

VDD_3V3_SOM

3.3V Power Output

3.3V

71

-

VDD_1V8_SOM

1.8V Power Output

1.8V

72

-

GND

GND

GND

73

A25

A25/ONOFF/PU

ON/OFF

1.8V

74

-

PMIC_KEY_RSTn/PU

Reset Input

1.8V

75

B24

B24/POR_B/PU

Reset Output

1.8V

76

-

GND

GND

GND

77

-

GND

GND

GND

78

AA27

AA27/USDHC2_WP/GPIO2_20

GPIO

1.8V/3.3V

79

AA26

AA26/USDHC2_CD_B/GPIO2_12

MMC2

1.8V/3.3V

80

AB24

AB24/USDHC2_DATA1/GPIO2_16

MMC2

1.8V/3.3V

81

AB23

AB23/USDHC2_DATA0/GPIO2_15

MMC2

1.8V/3.3V

82

W23

W23/USDHC2_CLK/GPIO2_13

MMC2

1.8V/3.3V

83

W24

W24/USDHC2_CMD/GPIO2_14

MMC2

1.8V/3.3V

84

V23

V23/USDHC2_DATA3/GPIO2_18/EARLY_RESET

MMC2

1.8V/3.3V

85

V24

V24/USDHC2_DATA2/GPIO2_17

MMC2

1.8V/3.3V

86

R23

R23/USDHC1_RESET_B/GPIO2_10

GPIO

1.8V

87

R24

R24/USDHC1_STROBE/GPIO2_11

GPIO

1.8V

88

J27

J27/CLKIN2

CLOCK

1.8V

89

J26

J26/CLKOUT2

CLOCK

1.8V

90

H27

H27/CLKIN1

CLOCK

1.8V

91

H26

H26/CLKOUT1

CLOCK

1.8V

92

-

GND

GND

GND

93

R22

R22/RAWNAND_DQS/QSPI_A_DQS/GPIO3_14

GPIO

1.8V

94

R27

R27/RAWNAND_WP_B/USDHC3_CMD/GPIO3_18

GPIO

1.8V

95

R26

R26/RAWNAND_WE_B/USDHC3_CLK/GPIO3_17

GPIO

1.8V

96

P26

P26/RAWNAND_READY_B/USDHC3_RESET_B/GPIO3_16

GPIO

1.8V

97

P27

P27/RAWNAND_CE1_B/QSPI_A_SS1_B/USDHC3_STROBE/GPIO3_2

GPIO

1.8V

98

N24

N24/RAWNAND_CE0_B/QSPI_A_SS0_B/GPIO3_1

GPIO

1.8V

99

M27

M27/RAWNAND_CE2_B/QSPI_B_SS0_B/USDHC3_DATA5/GPIO3_3

GPIO

1.8V

100

N27

N27/RAWNAND_RE_B/QSPI_B_DQS/USDHC3_DATA4/GPIO3_15

GPIO

1.8V

2.2.3            CON1C

表 5

邮票孔引脚号

芯片引脚号

引脚信号名称

引脚功能

参考电平

101

N22

N22/RAWNAND_ALE/QSPI_A_SCLK/GPIO3_0

GPIO

1.8V

102

K27

K27/RAWNAND_CLE/QSPI_B_SCLK/USDHC3_DATA7/GPIO3_5

GPIO

1.8V

103

L27

L27/RAWNAND_CE3_B/QSPI_B_SS1_B/USDHC3_DATA6/GPIO3_4

GPIO

1.8V

104

N26

N26/RAWNAND_DATA07/QSPI_B_DATA3/USDHC3_DATA3/GPIO3_13

GPIO

1.8V

105

K26

K26/RAWNAND_DATA06/QSPI_B_DATA2/USDHC3_DATA2/GPIO3_12

GPIO

1.8V

106

L26

L26/RAWNAND_DATA05/QSPI_B_DATA1/USDHC3_DATA1/GPIO3_11

GPIO

1.8V

107

M26

M26/RAWNAND_DATA04/QSPI_B_DATA0/USDHC3_DATA0/GPIO3_10

GPIO

1.8V

108

N23

N23/RAWNAND_DATA03/QSPI_A_DATA3/USDHC3_WP/GPIO3_9

GPIO

1.8V

109

K23

K23/RAWNAND_DATA02/QSPI_A_DATA2/USDHC3_CD_B/GPIO3_8

GPIO

1.8V

110

K24

K24/RAWNAND_DATA01/QSPI_A_DATA1/GPIO3_7

GPIO

1.8V

111

P23

P23/RAWNAND_DATA00/QSPI_A_DATA0/GPIO3_6

GPIO

1.8V

112

-

GND

GND

GND

113

F23

F23/USB2_VBUS/Z

USB2

3.3V

114

B23

B23/USB2_DP

USB2

-

115

A23

A23/USB2_DN

USB2

-

116

-

GND

GND

GND

117

D23

D23/USB2_ID

USB2

1.8V

118

F22

F22/USB1_VBUS/Z

USB1

3.3V

119

B22

B22/USB1_DP

USB1

-

120

A22

A22/USB1_DN

USB1

-

121

-

GND

GND

GND

122

D22

D22/USB1_ID

USB1

1.8V

123

-

GND

GND

GND

124

B21

B21/PCIE_REF_PAD_CLK_P

PCIe

-

125

A21

A21/PCIE_REF_PAD_CLK_N

PCIe

-

126

-

GND

GND

GND

127

B20

B20/PCIE_TXN_P

PCIe

-

128

A20

A20/PCIE_TXN_N

PCIe

-

129

-

GND

GND

GND

130

B19

B19/PCIE_RXN_P

PCIe

-

131

A19

A19/PCIE_RXN_N

PCIe

-

132

-

GND

GND

GND

133

B18

B18/MIPI_CSI_D3_P

MIPI_CSI

-

134

A18

A18/MIPI_CSI_D3_N

MIPI_CSI

-

135

B17

B17/MIPI_CSI_D2_P

MIPI_CSI

-

136

A17

A17/MIPI_CSI_D2_N

MIPI_CSI

-

137

B16

B16/MIPI_CSI_CLK_P

MIPI_CSI

-

138

A16

A16/MIPI_CSI_CLK_N

MIPI_CSI

-

139

B15

B15/MIPI_CSI_D1_P

MIPI_CSI

-

140

A15

A15/MIPI_CSI_D1_N

MIPI_CSI

-

141

B14

B14/MIPI_CSI_D0_P

MIPI_CSI

-

142

A14

A14/MIPI_CSI_D0_N

MIPI_CSI

-

143

-

GND

GND

GND

144

B13

B13/MIPI_DSI_D3_P

MIPI_DSI

-

145

A13

A13/MIPI_DSI_D3_N

MIPI_DSI

-

146

B12

B12/MIPI_DSI_D2_P

MIPI_DSI

-

147

A12

A12/MIPI_DSI_D2_N

MIPI_DSI

-

148

B11

B11/MIPI_DSI_CLK_P

MIPI_DSI

-

149

A11

A11/MIPI_DSI_CLK_N

MIPI_DSI

-

150

B10

B10/MIPI_DSI_D1_P

MIPI_DSI

-

151

A10

A10/MIPI_DSI_D1_N

MIPI_DSI

-

152

B9

B9/MIPI_DSI_D0_P

MIPI_DSI

-

153

A9

A9/MIPI_DSI_D0_N

MIPI_DSI

-

154

-

GND

GND

GND

155

F19

F19/UART4_RX/UART2_CTS_B/PCIE1_CLKREQ_B/GPIO5_28

UART4

1.8V

156

F18

F18/UART4_TX/UART2_RTS_B/GPIO5_29

UART4

1.8V

157

E18

E18/UART3_RX/UART1_CTS_B/USDHC3_RESET_B/GPIO5_26

UART3

1.8V

158

D18

D18/UART3_TX/UART1_RTS_B/USDHC3_VSELECT/GPIO5_27

UART3

1.8V

159

F15

F15/UART2_RX/ECSPI3_MISO/GPIO5_24

UART2

1.8V

160

E15

E15/UART2_TX/ECSPI3_SS0/GPIO5_25

UART2

1.8V

2.2.4            CON1D

表 6

邮票孔引脚号

芯片引脚号

引脚信号名称

引脚功能

参考电平

161

E14

E14/UART1_RX/ECSPI3_SCLK/GPIO5_22

UART1

1.8V

162

F13

F13/UART1_TX/ECSPI3_MOSI/GPIO5_23

UART1

1.8V

163

E13

E13/I2C4_SDA/PWM1_OUT/GPIO5_21/PU

I2C4

1.8V

164

D13

D13/I2C4_SCL/PWM2_OUT/PCIE1_CLKREQ_B/GPIO5_20/PU

I2C4

1.8V

165

F10

F10/I2C3_SDA/PWM3_OUT/GPT3_CLK/GPIO5_19/PU

I2C3

1.8V

166

E10

E10/I2C3_SCL/PWM4_OUT/GPT2_CLK/GPIO5_18/PU

I2C3

1.8V

167

F9

F9/I2C1_SDA/ENET1_MDIO/GPIO5_15/PU

I2C1

1.8V

168

E9

E9/I2C1_SCL/ENET1_MDC/GPIO5_14/PU

I2C1

1.8V

169

D9

D9/I2C2_SDA/ENET1_EVENT1_OUT/USDHC3_WP/GPIO5_17/PU

I2C2

1.8V

170

D10

D10/I2C2_SCL/ENET1_EVENT1_IN/USDHC3_CD_B/GPIO5_16/PU

I2C2

1.8V

171

-

GND

GND

GND

172

D6

D6/ECSPI1_SCLK/UART3_RX/GPIO5_6

ECSPI1

3.3V

173

A7

A7/ECSPI1_MISO/UART3_CTS_B/GPIO5_8

ECSPI1

3.3V

174

B7

B7/ECSPI1_MOSI/UART3_TX/GPIO5_7

ECSPI1

3.3V

175

B6

B6/ECSPI1_SS0/UART3_RTS_B/GPIO5_9

ECSPI1

3.3V

176

E6

E6/ECSPI2_SCLK/UART4_RX/GPIO5_10

ECSPI2

3.3V

177

A8

A8/ECSPI2_MISO/UART4_CTS_B/GPIO5_12

ECSPI2

3.3V

178

B8

B8/ECSPI2_MOSI/UART4_TX/GPIO5_11

ECSPI2

3.3V

179

A6

A6/ECSPI2_SS0/UART4_RTS_B/GPIO5_13

ECSPI2

3.3V

180

AD6

AD6/SAI3_MCLK/PWM4_OUT/SAI5_MCLK/GPIO5_2

SAI3

3.3V

181

AC6

AC6/SAI3_TX_SYNC/GPT1_CLK/SAI5_RX_DATA1/SAI3_TX_DATA1/UART2_RX/GPIO4_31

SAI3

3.3V

182

AG6

AG6/SAI3_TX_BCLK/GPT1_COMPARE2/SAI5_RX_DATA2/UART2_TX/GPIO5_0

SAI3

3.3V

183

AF6

AF6/SAI3_TX_DATA0/GPT1_COMPARE3/SAI5_RX_DATA3/GPIO5_1

SAI3

3.3V

184

AG7

AG7/SAI3_RX_BCLK/GPT1_CAPTURE2/SAI5_RX_BCLK/UART2_CTS_B/GPIO4_29

GPIO

3.3V

185

AF7

AF7/SAI3_RX_DATA0/GPT1_COMPARE1/SAI5_RX_DATA0/UART2_RTS_B/GPIO4_30

SAI3

3.3V

186

AG8

AG8/SAI3_RX_SYNC/GPT1_CAPTURE1/SAI5_RX_SYNC/SAI3_RX_DATA1/GPIO4_28

GPIO

3.3V

187

-

GND

GND

GND

188

AD9

AD9/GPIO1_13/USB1_OTG_OC/PWM2_OUT

GPIO

1.8V

189

AC9

AC9/GPIO1_14/USB2_OTG_PWR/USDHC3_CD_B/PWM3_OUT/CLKO1

CLKO1

1.8V

190

AB9

AB9/GPIO1_15/USB2_OTG_OC/USDHC3_WP/PWM4_OUT/CLKO2

GPIO

1.8V

191

AF11

AF11/GPIO1_7/ENET1_MDIOU/SDHC1_WP/EXT_CLK4

GPIO

1.8V

192

AG10

AG10/GPIO1_8/ENET1_EVENT0_IN/USDHC2_RESET_B

GPIO

1.8V

193

AF10

AF10/GPIO1_9/ENET1_EVENT0_OUT/USDHC3_RESET_B/SDMA2_EXT_EVENT0

GPIO

1.8V

194

AG11

AG11/GPIO1_6/ENET1_MDCU/SDHC1_CD_B/EXT_CLK3

GPIO

1.8V

195

-

GND

GND

GND

196

AF12

AF12/GPIO1_5/M4_NMI/PMIC_READY

GPIO

1.8V

197

-

GND

GND

GND

198

AF13

AF13/PMIC_nINT/GPIO1_3/1V8/PU/Z

GPIO

1.8V

199

AB10

AB10/GPIO1_12/USB1_OTG_PWR/SDMA2_EXT_EVENT1

GPIO

1.8V

200

AC10

AC10/GPIO1_11/USB2_OTG_ID/USDHC3_VSELECT/PMIC_READY

GPIO

1.8V

2.3    内部引脚使用说明

“邮票孔引脚号”为“-”表示核心板该内部引脚未引出至邮票孔,其他代表内部已使用且同时引出至核心板邮票孔。

表 7

邮票孔引脚号

芯片引脚号

引脚信号名称

引脚功能

参考电平

-

B27

B27/XTAL_24M

OSC(Y1)

1.8V

-

C26

C26/XTALO_24M

OSC(Y1)

1.8V

-

V26

V26/USDHC1_CLK/GPIO2_0

eMMC

1.8V

-

V27

V27/USDHC1_CMD/GPIO2_1

eMMC

1.8V

-

Y27

Y27/USDHC1_DATA0/GPIO2_2

eMMC

1.8V

-

Y26

Y26/USDHC1_DATA1/GPIO2_3

eMMC

1.8V

-

T27

T27/USDHC1_DATA2/GPIO2_4

eMMC

1.8V

-

T26

T26/USDHC1_DATA3/GPIO2_5

eMMC

1.8V

-

U27

U27/USDHC1_DATA4/GPIO2_6

eMMC

1.8V

-

U26

U26/USDHC1_DATA5/GPIO2_7

eMMC

1.8V

-

W27

W27/USDHC1_DATA6/GPIO2_8

eMMC

1.8V

-

W26

W26/USDHC1_DATA7/GPIO2_9

eMMC

1.8V

-

D27

D27/JTAG_MODE

JTAG

1.8V

-

F26

F26/JTAG_TCK

JTAG

1.8V

-

E27

E27/JTAG_TDI

JTAG

1.8V

-

E26

E26/JTAG_TDO

JTAG

1.8V

-

F27

F27/JTAG_TMS

JTAG

1.8V

-

AG14

AG14/GPIO1_0/ENET_PHY_REF_CLK_ROOT/REF_CLK_32K/EXT_CLK1

LED1

1.8V

-

AF14

AF14/GPIO1_1/PWM1_OUT/REF_CLK_24M/EXT_CLK2

LED2

1.8V

-

A24

A24/PMIC_ON_REQ

PMIC

1.8V

-

E24

E24/PMIC_STBY_REQ

PMIC

1.8V

-

F24

F24/RTC_RESET_B

PMIC

1.8V

-

A26

A26/RTC_XTALI

PMIC

1.8V

-

AG13

AG13/GPIO1_2/WDOG1_WDOG_B/WDOG1_WDOG_ANY

PMIC

1.8V

-

AB26

AB26/USDHC2_RESET_B/GPIO2_19/SYSTEM_RESET/PU

PMIC

1.8/3.3V

-

AG12

AG12/GPIO1_4/USDHC2_VSELECT/SDMA1_EXT_EVENT1

PMIC

1.8V

-

B25

B25/RTC_XTAL0

通过0R接到VDD_SNVS_0V8

1.8V

-

J24

J24/TSENSOR_RES_EXT

通过100K下拉到GND

1.8V

-

J23

J23/TSENSOR_TEST_OUT

接到测试点TP14

1.8V

-

E19

E19/USB1_TXRTUNE

通过200R电阻下拉至GND

1.8V

-

E22

E22/USB2_TXRTUNE

通过200R电阻下拉至GND

1.8V

75

B24

B24/POR_B/PU

POR_B

1.8V

167

F9

F9/I2C1_SDA/ENET1_MDIO/GPIO5_15/PU

I2C(PMIC)

1.8V

168

E9

E9/I2C1_SCL/ENET1_MDC/GPIO5_14/PU

I2C(PMIC)

1.8V

198

AF13

AF13/GPIO1_3/USDHC1_VSELECT/SDMA1_EXT_EVENT0

GPIO(PMIC)

1.8V

2.4    引脚上下拉、串联说明

下表为核心板内部已作上下拉配置或已串联电阻引脚的说明。表中未说明的引脚,核心板内部默认未作上下拉配置,直接引出至邮票孔。

表 8

邮票孔引脚号

芯片引脚号

引脚信号名称

上下拉配置

上下拉电阻值

36

D26

D26/TEST_MODE/PD

下拉GND

100K

73

A25

A25/ONOFF/PU

上拉1.8V

100K

75

B24

B24/POR_B/PU

上拉1.8V

100K

166

E10

E10/I2C3_SCL/PWM4_OUT/GPT2_CLK/GPIO5_18/PU

上拉1.8V

4.7K

165

F10

F10/I2C3_SDA/PWM3_OUT/GPT3_CLK/GPIO5_19/PU

上拉1.8V

4.7K

170

D10

D10/I2C2_SCL/ENET1_EVENT1_IN/USDHC3_CD_B/GPIO5_16/PU

上拉1.8V

4.7K

169

D9

D9/I2C2_SDA/ENET1_EVENT1_OUT/USDHC3_WP/GPIO5_17/PU

上拉1.8V

4.7K

168

E9

E9/I2C1_SCL/ENET1_MDC/GPIO5_14/PU

上拉1.8V

4.7K

167

F9

F9/I2C1_SDA/ENET1_MDIO/GPIO5_15/PU

上拉1.8V

4.7K

164

D13

D13/I2C4_SCL/PWM2_OUT/PCIE1_CLKREQ_B/GPIO5_20/PU

上拉1.8V

4.7K

163

E13

E13/I2C4_SDA/PWM1_OUT/GPIO5_21/PU

上拉1.8V

4.7K

118

F22

F22/USB1_VBUS/Z

-

串接30K电阻

113

F23

F23/USB2_VBUS/Z

-

串接30K电阻

2.5    功能引脚信号走线长度与阻抗说明

下表为核心板MMC、NAND、RGMII、MIPI、USB、PCIe等功能引脚信号PCB走线长度与阻抗说明。

表 9

芯片引脚号

引脚信号名称

引脚功能

走线长度/mil

阻抗说明

W24

W24/USDHC2_CMD/GPIO2_14

MMC2

1487.663

单端50ohm

W23

W23/USDHC2_CLK/GPIO2_13

MMC2

1464.549

单端50ohm

V24

V24/USDHC2_DATA2/GPIO2_17

MMC2

1398.526

单端50ohm

V23

V23/USDHC2_DATA3/GPIO2_18/EARLY_RESET

MMC2

1421.524

单端50ohm

AB26

AB26/USDHC2_RESET_B/GPIO2_19/SYSTEM_RESET

MMC2

1067.168

单端50ohm

AB24

AB24/USDHC2_DATA1/GPIO2_16

MMC2

1405.585

单端50ohm

AB23

AB23/USDHC2_DATA0/GPIO2_15

MMC2

1476.677

单端50ohm

AA27

AA27/USDHC2_WP/GPIO2_20

MMC2

1180.179

单端50ohm

AA26

AA26/USDHC2_CD_B/GPIO2_12

MMC2

1225.512

单端50ohm

AG26

AG26/ENET1_RGMII_TD0/GPIO1_21

RGMII

1064.397

单端50ohm

AG25

AG25/ENET1_RGMII_TD2/ENET1_TX_CLK/ENET_REF_CLK_ROOT/GPIO1_19

RGMII

1076.698

单端50ohm

AG24

AG24/ENET1_RGMII_TXC/ENET1_TX_ER/GPIO1_23

RGMII

1065.175

单端50ohm

AF26

AF26/ENET1_RGMII_TD1/GPIO1_20

RGMII

1051.122

单端50ohm

AF25

AF25/ENET1_RGMII_TD3/GPIO1_18

RGMII

1080.379

单端50ohm

AF24

AF24/ENET1_RGMII_TX_CTL/GPIO1_22

RGMII

1057.4

单端50ohm

AF27

AF27/ENET1_RGMII_RX_CTL/GPIO1_24

RGMII

1338.664

单端50ohm

AE27

AE27/ENET1_RGMII_RD0/GPIO1_26

RGMII

1343.089

单端50ohm

AE26

AE26/ENET1_RGMII_RXC/ENET1_RX_ER/GPIO1_25

RGMII

1342.18

单端50ohm

AD27

AD27/ENET1_RGMII_RD1/GPIO1_27

RGMII

1331.81

单端50ohm

AD26

AD26/ENET1_RGMII_RD2/GPIO1_28

RGMII

1348.798

单端50ohm

AC26

AC26/ENET1_RGMII_RD3/GPIO1_29

RGMII

1353.969

单端50ohm

R27

R27/RAWNAND_WP_B/USDHC3_CMD/GPIO3_18

NAND

1539.728

单端50ohm

R26

R26/RAWNAND_WE_B/USDHC3_CLK/GPIO3_17

NAND

1554.472

单端50ohm

R22

R22/RAWNAND_DQS/QSPI_A_DQS/GPIO3_14

QSPI/NAND

1935.761

单端50ohm

P27

P27/RAWNAND_CE1_B/QSPI_A_SS1_B/USDHC3_STROBE/GPIO3_2

QSPI/NAND

1595.235

单端50ohm

P26

P26/RAWNAND_READY_B/USDHC3_RESET_B/GPIO3_16

NAND

1598.812

单端50ohm

P23

P23/RAWNAND_DATA00/QSPI_A_DATA0/GPIO3_6

QSPI/NAND

1879.639

单端50ohm

N27

N27/RAWNAND_RE_B/QSPI_B_DQS/USDHC3_DATA4/GPIO3_15

QSPI/NAND

1640.482

单端50ohm

N26

N26/RAWNAND_DATA07/QSPI_B_DATA3/USDHC3_DATA3/GPIO3_13

QSPI/NAND

1849.041

单端50ohm

N24

N24/RAWNAND_CE0_B/QSPI_A_SS0_B/GPIO3_1

QSPI/NAND

1606.446

单端50ohm

N23

N23/RAWNAND_DATA03/QSPI_A_DATA3/USDHC3_WP/GPIO3_9

QSPI/NAND

1860.02

单端50ohm

N22

N22/RAWNAND_ALE/QSPI_A_SCLK/GPIO3_0

QSPI/NAND

1751.368

单端50ohm

M27

M27/RAWNAND_CE2_B/QSPI_B_SS0_B/USDHC3_DATA5/GPIO3_3

QSPI/NAND

1570.118

单端50ohm

M26

M26/RAWNAND_DATA04/QSPI_B_DATA0/USDHC3_DATA0/GPIO3_10

QSPI/NAND

1848.208

单端50ohm

L27

L27/RAWNAND_CE3_B/QSPI_B_SS1_B/USDHC3_DATA6/GPIO3_4

QSPI/NAND

1596.684

单端50ohm

L26

L26/RAWNAND_DATA05/QSPI_B_DATA1/USDHC3_DATA1/GPIO3_11

QSPI/NAND

1854.892

单端50ohm

K27

K27/RAWNAND_CLE/QSPI_B_SCLK/USDHC3_DATA7/GPIO3_5

QSPI/NAND

1597.726

单端50ohm

K26

K26/RAWNAND_DATA06/QSPI_B_DATA2/USDHC3_DATA2/GPIO3_12

QSPI/NAND

1859.997

单端50ohm

K24

K24/RAWNAND_DATA01/QSPI_A_DATA1/GPIO3_7

QSPI/NAND

1877.673

单端50ohm

K23

K23/RAWNAND_DATA02/QSPI_A_DATA2/USDHC3_CD_B/GPIO3_8

QSPI/NAND

1854.715

单端50ohm

B13

B13/MIPI_DSI_D3_P

MIPI_DSI

1014.601

差分100ohm

B12

B12/MIPI_DSI_D2_P

MIPI_DSI

1010.264

差分100ohm

B11

B11/MIPI_DSI_CLK_P

MIPI_DSI

1055.171

差分100ohm

B10

B10/MIPI_DSI_D1_P

MIPI_DSI

1100.49

差分100ohm

B9

B9/MIPI_DSI_D0_P

MIPI_DSI

1148.426

差分100ohm

A13

A13/MIPI_DSI_D3_N

MIPI_DSI

1016.33

差分100ohm

A12

A12/MIPI_DSI_D2_N

MIPI_DSI

1011.988

差分100ohm

A11

A11/MIPI_DSI_CLK_N

MIPI_DSI

1052.285

差分100ohm

A10

A10/MIPI_DSI_D1_N

MIPI_DSI

1102.214

差分100ohm

A9

A9/MIPI_DSI_D0_N

MIPI_DSI

1144.352

差分100ohm

B18

B18/MIPI_CSI_D3_P

MIPI_CSI

743.727

差分100ohm

B17

B17/MIPI_CSI_D2_P

MIPI_CSI

768.188

差分100ohm

B16

B16/MIPI_CSI_CLK_P

MIPI_CSI

792.649

差分100ohm

B15

B15/MIPI_CSI_D1_P

MIPI_CSI

832.719

差分100ohm

B14

B14/MIPI_CSI_D0_P

MIPI_CSI

885.396

差分100ohm

A18

A18/MIPI_CSI_D3_N

MIPI_CSI

745.454

差分100ohm

A17

A17/MIPI_CSI_D2_N

MIPI_CSI

769.917

差分100ohm

A16

A16/MIPI_CSI_CLK_N

MIPI_CSI

794.376

差分100ohm

A15

A15/MIPI_CSI_D1_N

MIPI_CSI

834.446

差分100ohm

A14

A14/MIPI_CSI_D0_N

MIPI_CSI

881.328

差分100ohm

Y27

Y27/USDHC1_DATA0/GPIO2_2

MMC1

1541.139

单端50ohm

Y26

V26/USDHC1_CLK/GPIO2_0

MMC1

1544.584

单端50ohm

W27

W27/USDHC1_DATA6/GPIO2_8

MMC1

1195.99

单端50ohm

W26

W26/USDHC1_DATA7/GPIO2_9

MMC1

1189.217

单端50ohm

V27

V27/USDHC1_CMD/GPIO2_1

MMC1

1445.206

单端50ohm

U27

U27/USDHC1_DATA4/GPIO2_6

MMC1

1159.843

单端50ohm

U26

U26/USDHC1_DATA5/GPIO2_7

MMC1

1250.174

单端50ohm

T27

T27/USDHC1_DATA2/GPIO2_4

MMC1

1535.641

单端50ohm

T26

T26/USDHC1_DATA3/GPIO2_5

MMC1

1487.741

单端50ohm

B23

B23/USB2_DP

USB2

889.125

差分90ohm

A23

A23/USB2_DN

USB2

885.018

差分90ohm

B22

B22/USB1_DP

USB1

770.891

差分90ohm

A22

A22/USB1_DN

USB1

764.651

差分90ohm

B20

B20/PCIE_TXN_P

PCIe

689.912

差分85ohm

A20

A20/PCIE_TXN_N

PCIe

689.553

差分85ohm

B19

B19/PCIE_RXN_P

PCIe

714.374

差分85ohm

A19

A19/PCIE_RXN_N

PCIe

714.015

差分85ohm

B21

B21/PCIE_REF_PAD_CLK_P

PCIe

698.535

差分85ohm

A21

A21/PCIE_REF_PAD_CLK_N

PCIe

698.176

差分85ohm

核心板PCIe相关信号按照官方手册要求的85ohm差分走线设计。但由于评估底板PCIe接口需外接PCIe硬盘等设备,因此按照PCIe规范要求的100ohm差分走线设计,相关设计未发现会影响PCIe功能。

图 8

3          电气特性

3.1    工作环境

表 10

环境参数

最小值

典型值

最大值

工作温度

-40°C

/

85°C

存储温度

-50°C

/

90°C

工作湿度

35%(无凝露)

/

75%(无凝露)

存储湿度

35%(无凝露)

/

75%(无凝露)

工作电压

/

5.0V

/

3.2    功耗测试

表 11

工作状态

电压典型值

电流典型值

功耗典型值

空闲状态

5.0V

0.22A

1.10W

满负荷状态

5.0V

0.61A

3.05W

备注:功耗基于TLIMX8-EVM评估板开启散热风扇的情况下测得。功耗测试数据与具体应用场景有关,测试数据仅供参考。

空闲状态系统启动,评估板不接入其他外接模块,不执行程序。

满负荷状态系统启动,评估板不接入其他外接模块,运行DDR压力读写测试程序,4个ARM Cortex-A53核心使用率约为100%。

3.3    热成像图

核心板安装好带风扇的散热器,在常温环境、满负荷状态下稳定工作10min后,测试核心板热成像图如下所示。H为最高温度,S为平均温度。

备注:不同测试条件下结果会有所差异,数据仅供参考。

图 9 不开启散热风扇

图 10 开启散热风扇

请参考以上测试结果,并根据实际情况合理选择散热方式。

4          机械尺寸

核心板主要硬件相关参数如下所示,仅供参考。

表 12

重量

11.5g

PCB尺寸

45mm*65mm

PCB层数

8层

元器件最高高度

1.295mm

PCB板厚

1.2mm

图 11

 

图 12

元器件最高高度:指核心板最高元器件水平面与PCB正面水平面的高度差。核心板最高元器件为LDO(U3)。

5          底板设计注意事项

5.1    最小系统设计

基于SOM-TLIMX8核心板进行底板设计时,请务必满足最小系统设计要求,具体如下。

5.1.1            电源设计说明

(1)        VDD_5V_SOM

VDD_5V_SOM(VDD_5V_MIAN)为核心板的主供电输入,电源功率建议参考评估板按最大10W进行设计。

图 13

VDD_5V_SOM在核心板内部未预留总电源输入的储能大电容,底板设计时请参照评估底板原理图,在靠近邮票孔焊盘位置放置储能大电容。

 

图 14

(2)        VDD_3V3_SOM & VDD_1V8_SOM

VDD_3V3_SOM、VDD_1V8_SOM为核心板输出的BOOT SET配置专用供电电源,最大电流均约为200mA,请勿用于其他负载供电。

图 15

(3)        VDD_3V3_MAIN & VDD_1V8_MAIN

VDD_3V3_MAIN、VDD_1V8_MAIN为底板提供的外设电源。为使VDD_3V3_MAIN、VDD_1V8_MAIN满足处理器的上电、掉电时序要求,推荐使用VDD_3V3_SOM电源来控制VDD_3V3_MAIN的电源使能,使用VDD_1V8_SOM电源来控制VDD_1V8_MAIN的电源使能。

图 16

图 17

5.1.2            系统启动配置

由于BOOT SET引脚与SAI1、GPIO存在复用关系,若使用SAI1、GPIO外接设备,请保证CPU在上电初始化过程中BOOT SET引脚电平不受外接设备的影响,否则将会导致CPU无法正常启动。

核心板内部BOOT_MODE3已设计100K下拉电阻,BOOT_CFG[15:0]和BOOT_MODE[2:0]未设计上下拉电阻,需在底板设计启动配置电路。设计系统启动配置电路时,请参考评估底板BOOT SET部分电路进行相关设计。

 

图 18

图 19

5.1.3            系统复位信号

(1)        PMIC_KEY_RSTn(PMIC_POR_B)

PMIC_KEY_RSTn为PMIC的上电复位输入引脚,可用于控制i.MX 8M Mini复位输入引脚,以及外设接口的复位。PMIC内部已有上拉电阻,默认情况请悬空处理。

(2)        B24/POR_B

B24/POR_B为CPU的复位输入引脚,核心板内部已设计100K上拉电阻,与PMIC的复位输出引脚PMIC_POR_B相连。对于有严格上电复位顺序的外设,需结合外设的上电和复位时序来使用B24/POR_B。

(3)        A25/ONOFF

A25/ONOFF为CPU的开关机控制引脚,核心板内部已设计100K上拉电阻,默认情况请悬空处理。

5.2    其他设计注意事项

5.2.1            保留Micro SD卡接口

评估底板通过MMC2总线引出Micro SD卡接口,主要用于调试过程中使用Linux系统启动卡来启动系统,或批量生产时可基于Micro SD卡快速固化系统,底板设计时建议保留此外设接口。

5.2.2            保留UART2接口

评估底板将UART2_RXD和UART2_TXD引脚通过CH340T芯片引至Micro USB接口,作为系统调试串口使用,底板设计时建议保留UART2作为系统调试串口。

5.2.3            散热设计说明

对核心板散热设计建议如下。

(1)        当环境温度不高于60℃、核心板功耗不高于3.57W时,可考虑不添加散热片。

(2)        当环境温度不超过85℃、核心板功耗不高于3.64W时,可考虑使用不带风扇的散热片,但要求使用相变硅脂导热垫片进行导热。

(3)        当环境温度超过85℃时,强烈建议使用带风扇的散热片,并结合实际应用做进一步验证测试。

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Origin blog.csdn.net/Tronlong/article/details/131410015