Article directory
foreword
Because the final exam is coming, I summarized the knowledge points and divided the knowledge points to be tested in chapters so that I can get a good result.
Chapter One
Hexadecimal conversion 8421 code, 2421 code, remainder 3 code, Gray code; original code, inverse code, complement code
parity check code
Chapter two
1, 5 Axioms 3 Operations 3 Representation 8 Theorems (Containment Law) 3 Rules Memory
2, XOR and XOR; AND-OR expressions and OR-AND expressions; minimum term
3, Function simplification
third chapter
1. TTL: Transistor-transistor logic
2, AND, OR, NOT gate symbol, graphic P76 memory chart
3. Flip-flop: There are two complementary output terminals Q and Q NOT.
Chapter Four
1. Logic circuits are divided into combination logic circuits and sequential logic circuits according to whether they have a memory function.
P96 Example 4.2 4.4 4.9
2. The phenomenon that the input signal arrives at the output terminal through different paths is a competition phenomenon, which makes the change of the input signal may cause unexpected error output of the input signal. This phenomenon is called danger. Usually, the contention that does not produce erroneous output is non-critical contention, and vice versa is critical contention.
3. Elimination of danger: increase redundancy method, increase inertial delay link, gating method.
chapter Five
1. Sequential logic circuits can be divided into synchronous sequential logic circuits and asynchronous sequential logic circuits according to their different working methods; according to whether the output of the circuit is directly related to the input, it can be divided into Mealy type and Moore type; according to the input signal form can be divided into It is pulse type and level type.
2. The stable output signal generated by a combinational logic circuit at any time is only related to the input signal of the circuit at that time; while the stable output signal generated by a sequential logic circuit at any time is not only related to the input signal of the circuit at that time, but also related to the past of the circuit of the input signal.
P120 Example 5.1
Chapter Six
1. Working characteristics of asynchronous sequential logic circuit
Whether the input signal is a pulse signal or a level signal, there are certain constraints on its changing process. Asynchronous sequential logic circuits can be divided into two types: pulse asynchronous sequential logic circuits and level asynchronous sequential logic circuits
Chapter VII:
1. Memory: combinational logic circuit: decoder, encoder, full adder
Non-combinational logic circuit: register,
eight-way data distributor, with three address input terminals (selection control terminal)
2. The most widely used medium-scale combination Logic integrated circuits have binary parallel adders, decoders (binary decoders, binary-decimal decoders, digital display decoders, 3-8 line decoders), encoders, multiplexers and multiplexers. dispensers etc.
P187 Example 7.5
Total Subtractor: It is a logic circuit that implements subtraction of minuend, subtrahend and borrow from adjacent lower bits to obtain difference and borrow from adjacent higher bits.
3. A multiplexer is also called a data selector or a multiplexer, represented by MUX.
P194 Example 7.8
Demultiplexer, also known as data distributor, is often represented by DEMUX. The structure is opposite to MUX. It is a logic component with single input and multiple outputs. 4. The
counter is a sequential logic circuit that can sequentially pass through predetermined states under the action of input signals According to its working mode, it can be divided into synchronous counter and asynchronous counter; according to its base system, it can be divided into binary counter, decimal counter and arbitrary base counter; according to its function, it can be divided into adding calculator, subtracting counter and adding/subtracting reversible counter . Generally, it has the functions of counting, saving, clearing and preset.
P199 Example 7.12 7.13 P203 Example 7.15
5. A device that converts digital signals into analog signals is called a digital/analog converter, or D/A converter or DAC for short; a device that converts analog signals into digital signals is called an analog/digital converter , referred to as A/D converter or ADC.
chapter eight
1. PLD is a programmable logic device, including: PROM-programmable read-only memory; PLA-programmable logic array; PAL-programmable array logic. GAL is a general-purpose array logic (both are low-density programmable logic devices), and FPGA is a field programmable gate array
. According to the degree of integration, PLD is usually divided into LDPLD and HDPLD (high-density programmable logic device integration degree>=1000 gates)
2 , Semiconductor memory can be divided into according to its function: random access memory RAM (read/write memory) and read-only memory ROM (non-volatile memory)
3, the content is not understood, remember the name corresponding to each abbreviation, may There will be two fill-in-the-blank questions
Summarize
Numerical logic review, rush for the final exam! ! !