[Computer Composition Principle Notes] Bus Control

bus control

Multiple components are connected on the bus, in order to solve:

  • When and which component sends information
  • How to time the message delivery
  • How to prevent information loss
  • How to avoid sending multiple parts at the same time
  • How to specify components that receive information

For a series of problems, the bus control line is required for unified management. This is bus control, which includes two aspects:

  • Arbitration Control
  • communication control

Arbitration Control

Bus arbitration control, also known as bus arbitration, can be further divided into two categories:

  • centralized control
  • distributed control

Devices connected to the bus can be divided into master devices (modules) and slave devices (modules). The master device has control over the bus, and the slave device can only respond to bus commands from the master device.

centralized control

  1. chain query

Three of the control buses are used for bus control, namely: BS (bus busy), BR (bus request) and BG (bus unification):

Bus Control - Chained Queries

The BG signal is serial. If a certain interface is requested by the BR, the device connected to the interface obtains the right to use the bus and establishes a BS, indicating that it has occupied the bus. Therefore, the closer the device is to the control unit, the higher the priority
Only 2 wires are needed to determine the bus user

advantage:

  • Simple
  • Easy to expand

shortcoming:

  • Sensitive to circuit failures
    If the interface of the i-th device fails, all devices after i cannot be used
  • fixed priority
  • Devices with low priority may starve
  1. Counter Timing Query

Compared with the chain query, the BG bus is removed, and the device address line is added:

Bus Control - Counter Timing Query

When a BR request is generated, if BS=0, the counter starts counting. When the count value is consistent with the address of one of the devices requesting to use the bus, the technology is terminated. The device or the bus usage right needs log ⁡ 2 n \
log_2 nlog2n lines determine the use of equipment, n is the maximum number of equipment allowed

advantage:

  • variable priority
  • Insensitive to circuit faults

shortcoming:

  • Added a set of equipment lines, the equipment needs to decode the signal of the equipment lines, and the control becomes complicated
  1. independent request method

Each device has a pair of BR and BG lines, and there is a queue in the bus control unit:

Bus Control - Independent Request

When the device requests the bus, it sends out a BR signal. If the bus is busy (BS=1), it enters the queue. The queue circuit specifies the priority of the devices in the queue according to certain rules. 2n lines are required to determine the use of the device, and n is allowed to be accepted
. Maximum number of devices

advantage:

  • The order is flexible and variable (can be specified by the program)
  • quick response
  • Can block requests from a device

shortcoming:

  • There are a large number of control lines, and the bus control is the most complicated

★ Contemporary bus control standards generally use independent request mode

communication control

Bus cycle: the time to complete a sequential bus operation

  1. Apply for Allocation: Master Device Request
  2. Addressing phase: the master device finds the required slave device
  3. Data transfer stage: master-slave device data exchange
  4. End phase: the master device yields the bus

The bus communication control solves the problem of how the two parties in the communication know the start and end of the transmission, and how the two parties in the communication coordinate and cooperate. There are four commonly used communication methods: synchronous communication, asynchronous communication, semi-synchronous communication and separated communication.

  • Synchronous communication Control data transmission
    by unified time scale

advantage:

  • The regulations are clear and unified, and the cooperation is simple
  • Suitable for scenarios where the bus is short and the component access time is consistent

shortcoming:

  • The master-slave time cooperates with forced synchronization, and the common clock has to be designed according to the speed of the lowest speed device
  • Asynchronous communication
    adopts response mode , which can be divided into three types: no interlock, half interlock and full interlock

advantage:

  • Addresses the disadvantages of synchronous communication
  • Semi-synchronous communication
    Synchronous and asynchronous combination:

    • Synchronize:
      • The sender signals with the leading edge of the clock
      • The receiver uses the clock trailing edge to judge and identify
    • asynchronous:
      • Coordinated work of devices with different speeds
      • Add WAIT (wait for response signal) line
        Advantages:
    • Compatible with the advantages of synchronous and asynchronous
  • Disaggregated communication
    Fully tap the potential of every moment of the system bus:

    • Each module has the right to occupy the bus
    • synchronous communication
    • When each module prepares data, it does not occupy the bus
    • When the bus is occupied, there is no idle

Increased effective bus occupancy

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Origin blog.csdn.net/m0_51810668/article/details/131022707