Cortex_M3 register bank overview

Register bank

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  1. R0--R12: General purpose registers

R0-R12 are all 32-bit general-purpose registers for data manipulation.

  1. R13: Stack Pointer Register (sp)

Cortex-M3 has two stack pointers, but they are banked, so only one of them can be used at any time.
Main stack pointer (MSP): The stack pointer used by default after reset is used for the operating system kernel and exception handling routines (including terminal services).
Process Stack Pointer (PSP): Used by user code.
Because the stack pointer is always aligned with 4 bytes, the lowest two bits of the stack pointer are always 0.
The most typical application is to save the value of the register before data processing, and then restore the previously protected value after the processing task is completed.
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  1. R14: Link Register (LR)

When a subroutine is called, the return address is stored by R14

  1. R15: Program Counting Register (PC)

Point to the current program address, if you change its value, it will change the execution flow of the program;

  1. Special function register

In addition, Cortex-M3 is also equipped with several special function registers at the core level:
Program Status Word Registers (PSRs)
Interrupt Mask Registers (PRIMASK, FAULTMASK, BASEPRI)
Control Registers (CONTROL)
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For time critical PRIMASK and BASEPRI are important for temporarily shutting down interrupts. FAULTMASK can be used by the OS to temporarily turn off the fault processing function. It is mainly used when the system crashes. At this time, there will be a lot of faults. When the system handles funeral affairs, it does not need to respond to the faults.

Control register (CONTROL): The control register is used to define the privilege level and is also used to select which stack pointer is currently used.
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Origin blog.csdn.net/weixin_43704402/article/details/114915237