Register (8086CPU) overview and function

Register (8086CPU) overview and function

0 Overview

All registers are 16 bits and can store two bytes. The 8086CPU has a total of 14 registers, namely: AX, BX, CX, DX, SI, DI, SP, BP, IP, CS, SS, DS, ES, FLAG .

These 14 registers are divided into general registers , control registers and segment registers in a certain way .

• General registers:
  • Data registers : AX, BX, CX, DX
  • Pointer registers : SP, BP
  • Index register : SI, DI
• Segment registers: CS, SS, DS, ES
• Control registers: IP, FLAG

register	English name	Classification	Specific name	Common associations
AX	Accumulator	data register	accumulation register	The div division instruction and the mul multiplication instruction will be called; the input and output of the port can only be stored in ax and al
BX	Base	data register	base address register	Often used with ds, es; [bx] defaults to calling ds:[bx]
CX	Count	data register	counter register	Store the number of loops, loop, jcxz command will call cx
DX	Data	data register	data register	Commonly used to store data
SP	Stack Pointer	pointer register	stack pointer register	Store the offset address of the top of the stack
BP	Base Pointer	pointer register	base pointer register	It is associated with ss by default, such as [bp] calls ss by default:[bp]
AND	Source Index	index register	source index register	Commonly used in ds:[si], store offset address, where does the data come from
FROM	Destination Index	index register	Destination Address Register	Commonly used in es:[di], store offset address, where does the data go
DS	Data Segment	segment register	data segment register	Commonly used in ds:[si], store segment address, where does the data come from
ES	Extra Segment	segment register	additional segment register	Commonly used in es:[di], store offset address, where does the data go
SS	Stack Segment	segment register	stack segment register	Store the segment address of the stack
CS	Code Segment	segment register	code segment register	The segment address where the instruction is stored
IP	Instruction Pointer	control register	instruction pointer register	Store the offset address of the executed instruction
FLAG	Flag	control register	flag register	Bitwise function, see text for details

1 general purpose register

AX, BX, CX, and DX are used to store general data and are collectively referred to as general-purpose registers.

Taking AX as an example, the logical structure of the register is as follows:

The four registers AX, BX, CX, and DX can be divided into two 8-bit registers that can be used independently. Taking AX as an example, the 16-bit register is divided into two 8-bit registers as shown in the figure:

1.1 Data registers

1.1.1 Accumulation register (AX)

The AX register is also known as the accumulator register or the accumulator for short. In addition to its role of temporarily storing data, it also has some special functions, that is, when using the MUL instruction and the DIV instruction.

• When using MUL for multiplication, the two multiplied numbers are either 8-bit or 16-bit. If the two multiplied numbers are both 8- bit, one is stored in AL, the other is located in other registers or memory byte units , and the default multiplication result is stored in AX; if the two multiplied numbers are both 16- bit , one is stored in AX by default, the other is located in other registers or memory word units , the default multiplication result has 32 bits, the high bit is stored in DX by default, and the low bit is stored in AX by default.
• When using MUL for division, there are two situations for the divisor, that is, the divisor can be 8-bit or 16-bit, and the divisor can be stored in a register or a memory unit, and the dividend is in charge of AX. When the divisor is 8 bits , the dividend must be 16 bits, and it is placed in the AX register by default; when the divisor is 16 bits , the dividend must be 32 bits, and the high 16 bits of the dividend are stored in DX, and the low 16 bits stored in AX.

1.1.2 Base address register (BX)

In addition to the function of temporarily storing general data, BX is mainly used for its exclusive function - addressing (finding the physical memory address), and the data stored in the BX register is generally used as an offset address. In the 8086 CPU, the CPU performs addressing operations based on <segment address: offset address>, which is often used in conjunction with DS and ES, for example, the DS:[BX]default [BX]call DS:[BX].

1.1.3 Counter Register (CX)

In addition to the function of temporarily storing general data, CX also has its special purpose - storing the number of cycles , loop, jcxz instructions will call cx.

When using the LOOP instruction, you can specify the number of times to loop through CX. Every time the CPU executes the LOOP instruction, it will do two things:

1. Let CX=CX-1, that is, let the CX counter subtract one
2. Judge the value in CX, if the value in CX is 0, jump out of the loop

1.1.4 Data register (DX)

In addition to the function of temporarily storing general data, DX also has uses in other aspects, which have been introduced in the introduction of the AX register.

1.2 Pointer Register

1.2.1 BP register

BP is the base pointer register, which is not much different from the other registers (BX, SI, DI) used for addressing operations.

As a kind of general-purpose register, it can temporarily store data, and BP is not a data register, which means that it cannot be divided into two 8-bit registers.

If the memory unit is accessed in the way of […] and the register BP is used in […], then if the segment address is not explicitly or explicitly given in the instruction, the segment address uses the value in the default SS register (BX, SI, DI will use the DS segment register by default), for example, DS:[BP] clearly shows that the segment address is located in DS.

1.2.2 SP register

The SP register must be used together with the SS segment register, so the SP register will be introduced later together with the SS segment register

1.3 Index register

SI (Source Index) is the source index register, DI (Destination Index) is the destination index register.

The SI register and DI register in the 8086 CPU actually have similar functions to the BX register, that is, addressing operations and temporary storage of general data, but neither the SI register nor the DI register is a data register, so they cannot be split into 2 an independent 8-bit register.

SI : Commonly used in DS:[SI], store offset address, where does the data come from

DI : Commonly used in ES:[DI], store segment address, where does the data come from

Example:

MOV SI,0		    ;初始化偏移地址为 0
MOV AX,[SI]		    ;将段地址为 DS 偏移地址为 SI 的内存单元中的值移入 AX 中
MOV AX,DS:[SI]		;将段地址为 DS 偏移地址为 SI 的内存单元中的值移入 AX 中
MOV AX,SS:[SI]		;将段地址为 SS 偏移地址为 SI 的内存单元中的值移入 AX 中

MOV DI,0    		;初始化偏移地址为 0
MOV AX,[DI]		    ;将段地址为 DS 偏移地址为 DI 的内存单元中的值移入 AX 中
MOV AX,DS:[DI]		;将段地址为 DS 偏移地址为 DI 的内存单元中的值移入 AX 中
MOV AX,SS:[DI]		;将段地址为 SS 偏移地址为 DI 的内存单元中的值移入 AX 中

2 segment registers

2.1 Code Segment Register (CS)

The two registers CS:IP indicate the address of the instruction that the CPU will read currently, among which CS is the code segment register, and IP is the instruction pointer register.

When we run an executable file, we need another program to load the executable file into the memory. Generally, after the executable file is loaded into the memory through the shell program (Shell program) of the operating system, it will set The two registers in the CPU, that is, set the CS:IP two registers to point to the start address of the executable file, and then the CPU starts to read the instructions in the memory from this start address and execute them.

When we write an assembler, we usually use the START mark. In fact, this mark is used to mark the start address. After compiling an assembler and linking it into an executable file, the executable file After loading into memory, the address marked by START is the starting address of the entire executable file.

That is, when an executable file is loaded into the memory, the CS:IP two registers point to the start address of the executable file, and then the CPU can start reading instructions from this start address, when reading After the instruction is finished, CS:IP will automatically change (basically change the IP) to point to the next instruction to be read, so that the executable file can be executed.

2.2 Stack Segment Register (SS)

At any moment, SS:SP points to the top element of the stack . It should be noted that the 8086 CPU does not guarantee that our operation on the stack will not exceed the boundary, so we need to pay special attention to the stack boundary problem when using the stack.

• When using the PUSH instruction to push a byte unit into the stack, SP = SP - 1; that is, the top element of the stack will change;

• When using the PUSH instruction to push a 2-byte word unit into the stack, SP = SP – 2; that is, the top element of the stack will also change;

• When using the POP instruction to pop a byte unit from the stack, SP = SP + 1; that is, the top element of the stack will change;

• When using the POP instruction to pop a word unit of 2 byte units from the stack, SP = SP + 2; that is, the top element of the stack will change;

2.3 Data Segment Register (DS) and Attachment Segment Register (ES)

The DS segment register is used to store the segment address of the data to be accessed; the ES segment register is an additional segment register. When other segment registers are not enough, ES segment registers can be considered.

3 Control registers

3.1 FLAG register

The FLAG register is different from other registers. Other registers are used to store data, and the FLAG register works bit by bit.

The FLAG register structure of the 8086CPU is shown in the figure:

• ZF flag : zero flag bit, record whether the result is 0 after the related instruction is executed. If the result is 0, then zf=1; if the result is not 0, then zf=0.
• PF flag : parity flag bit, records whether the number of 1s in all bits of the result is an even number after the relevant instruction is executed. If the number of 1s is even, then pf=1; if it is odd, then pf=0.
• SF flag : symbol flag bit. Record whether the result is negative after the relevant instruction is executed. If the result is negative, sf=1; if non-negative, sf=0.
• CF flag : Carry flag bit, in general, when performing unsigned number operations, record whether the most significant bit of the operation result is carried to a higher bit, or borrowed from a higher bit.
• OF flag : overflow flag bit, under normal circumstances, records whether the result of the signed number operation overflows. If overflow occurs, OF=1; if not, OF=0;
• DF flag : The direction flag bit, in the string processing instruction, controls the increase or decrease of si and di after each operation. df=0, si and di increase; df=1, si and di decrease.

3.2 IP registers

It is usually used in conjunction with the CS register, which has been introduced in the previous CS introduction.

4 Shoulders of Giants

Wang Shuang. Assembly Language. 3rd Edition [M]. Tsinghua University Press, 2013.

https://blog.csdn.net/ulan420/article/details/126329586