This is my first time writing a blog, so I don’t know much about it, I just want to express my opinions.
The version used is Multisim14.0, which I found at station B.
Experiment 1 verifies the operation and logic functions of 74LS181
Experiment 1 Verifies the operation and logic functions of 74LS181
1. Experiment purpose
(3) Master the working principle of the arithmetic logic unit (ALU);
(4) Be familiar with the data transmission path of the simple arithmetic unit;
(5) Draw the logic circuit diagram and layout it beautifully and neatly Wiring diagram;
(6) Verify the combined function of the 4-bit arithmetic function generator (74LS181).
2. Overall design
1. Basic principles:
Basic principles of ALU operation When the computer is running, the operation and type of operation of the arithmetic unit are determined by the controller. The data processed by the arithmetic unit comes from the memory; the processed result data is usually sent back to the memory or temporarily stored in the arithmetic unit. ALU is a component in the computer that performs various arithmetic and logical operations. The basic operations of the arithmetic unit include the four arithmetic operations of addition, subtraction, multiplication, and division, logical operations such as AND, OR, NOT, and XOR, as well as shifts, comparisons, and transmissions. etc. are all called logical operations.
2. Module introduction:
(1) Input module: Use DIP switches and high voltage to provide an input system
(2) Operation module: Use 74LS181N chip to connect wires to form a computing center
(3) Output module: Finally, use digital tubes to process data. show.
3. Design steps:
(1) First understand the circuit diagram and circuit diagram principles as well as the functions and applications of each pin of the chip, then complete the circuit diagram connections and start testing.
(2) Run the test based on the following computing functions! 
2. Experimental results and analysis
Results of the verification function
4. Summary and
experience
Experiment 2 calculator
1. Purpose of the experiment
(1) Proficient in the application method of arithmetic logic unit (ALU);
(2) Become more familiar with the data transmission principle of simple arithmetic units;
(3) Draw logic circuit diagrams and lay out beautiful and neat wiring diagrams;
(4) ) Be proficient in the functions and usage of digital components.
(5) Be proficient in the creation and use of sub-circuits.
2. Overall design
1. Basic principle:
In the circuit diagram, the 8 lines on the top, right and bottom simulate an 8-bit data bus; K8 generates the required data; the 74244 level block is a three-state gate circuit that connects or disconnects components from the bus. Remember that there can only be one input on the bus; two 74273 level blocks serve as temporary working registers DR1 and DR2; two 74374 level blocks serve as general register groups (in view of the circuit arrangement, only two general registers GR1 and GR2 are drawn. If If possible, 4 or 8 general-purpose registers can be designed); numerous switches are used as control levels or input pulses; numerous 8-segment code tubes display data information at corresponding positions; the core is an 8-bit ALU level block.
Circuit diagram drawn on Multisim
2. Module introduction:
(1) Input module: Use DIP switches combined with high voltage and bus to input data
(2) Register module: Use 74LS374N and 74LS244N to connect one piece each to form a register module
(3) Workspace module: Use 74LS273N And 74LS244 are connected together to form a workspace module
(4) Computing module: Use 74LS181N and 74LS244 to connect to form a computing module and then connect to the workspace. The workspace passes the data to the computing module for calculation and obtains the result.
(5) Output module: Use digital tubes to display data.
3. Design steps:
(1) First understand the circuit diagram and circuit diagram principles as well as the application of each pin of the chip, and then connect and test the circuit diagram.
(2) Test the storage module and working module.
(3) Finally, combine the running function of Experiment 1 for the final test run.
2. Experimental results and analysis
(1) Explain the working principle of the entire circuit.
The entire circuit is required to store data and process data, mainly to implement data processing, that is, arithmetic operations and logical operations of the arithmetic unit.
(2) Explain the function of 74LS244N, its role in the circuit, and the role of the input signal G;
74LS244N is a three-state gate, which isolates the circuit when the control level G=1. When the control level G=0, the 74LS244N component starts to work. In this circuit diagram, it is controlled whether the data is released.
(3) Explain the function of 74LS273N and its role in the circuit, as well as the role of the input signal CLK;
74LS273N is a working register, the output is directly connected to the input of the ALU, and CLK is the connected pulse.
(4) Explain the function of 74LS374N and its role in the circuit, as well as the role of CLK and OC;
74LS374N, as a general-purpose register, also has the function of a three-state gate. CLK functions as an input pulse, while OC high level is in a high-impedance state, and logic operations are not affected.
(5) K8 generates arbitrary data and stores it in the general register GR1.
The corresponding DIP switch is turned on————>The data enters the BUS bus——>The DIP switch corresponding to the OC gate of GR1 is set to 0——>The trigger CLK of GR1 is triggered——>The data is stored in GR1
(6 )K8 generates arbitrary data and stores it in the general register GR2.
The corresponding DIP switch is turned on————>The data enters the BUS bus——>The DIP switch corresponding to the OC gate of GR2 is set to 0——>The trigger CLK of GR1 is triggered——>The data is stored in GR2
(7 ) Complete GR1+GR2→GR1.
After the above two steps are completed -> close the DIP switch corresponding to the bus transmission data -> open the 74244 of GR1 to release the data to the bus -> open the input terminal of DR1 and set the OC gate of 74244 to 0 -> let the trigger The CLK of the device DR1 triggers——>The data is temporarily stored in DR1——>Close and open the 74244 of GR1 to stop the data release——>Close the input terminal of DR1 and set the OC gate of 74244 to 1——>The next second data Repeat the process of the first data until the second data is temporarily stored in DR2 -> the addition operation sets s3-s0 of 74LS181 to 1001, CN=1, M=0 -> the OC gate of 74LS244 is 0 to release the data to the bus -> then set the DIP switch of the OC gate corresponding to GR2 to 0 again -> let the trigger CLK of GR1 trigger -> the data is saved in GR2
(8) to complete GR1-GR2→GR2.
Similar to the addition operation steps: modify s3–s0 of 74LS181 to 0110, CN=0, M=0
(9) Complete GR1∧GR2→GR1.
Similar to the addition operation steps: modify s3–s0 of 74LS181 to 0010, M=1, CN does not require
(10) to complete GR1∨GR2→GR2.
Similar to the addition operation steps: modify s3–s0 of 74LS181 to 1000, M=1, CN does not require
(11) to complete GR1⊕GR2→GR1.
Similar to the addition operation steps: modify s3–s0 of 74LS181 to 0110, M=1, CN does not require
(12) GR1→GR2. (" " means logical NOT operation)
The steps are similar to the addition operation: modify s3–s0 of 74LS181 to 0000, M=1, CN does not require
(13) ~GR2→GR1.
Similar to the addition operation steps: modify s3–s0 of 74LS181 to 1010, M=1, CN is not required
4. Summary and experience
omitted
Experimental three-character generator and marquee
1. Experiment purpose
: Understand how to use the word generator.
2. Overall design
1. Basic principle:
By setting the data of the word generator, the probes are lit in sequence to form a marquee. The Word Generator can use a variety of methods to generate 32-bit synchronous logic signals for testing digital circuits. It is a universal digital input editor.
2. Module introduction:
(1) Input module: Use a DIP switch and high voltage to provide an input system
(2) Main module: Use a self-generator to connect wires to form a center
(3) Output module: Use a light bulb to let it adjust according to our needs The command input to the word generator is displayed.
3. Experimental results and analysis
4. Summary and experience
The principle of this experiment is still very simple. You need to understand that the pins and the high and low bits correspond to each other one by one. You only need to understand that the next line is the next execution instruction. This experiment is still simple.
Experiment 4 simulates microprogram implementation instructions
1. Experiment purpose
: Simulate microprogram to implement machine language instructions
2. Overall design
1. Basic principle:
A line of output data from the word generator can be used as a microinstruction, and a machine language instruction is composed of several microinstructions. Use the output of the word generator to replace the switch in Figure 2-3, and simulate the automatic execution of a microinstruction to implement a machine language instruction.
2. Module introduction:
(1) Input module: Use wires and word generator to provide input system
(2) Register module: Use 74LS374N and 74LS244N to connect one piece each to form a register module
(3) Workspace module: use 74LS273N and 74LS244 to connect one piece each to form a workspace module
(5) Operation module: use 74LS181N and 74LS244 to connect to form an operation module and then connect to the workspace. The workspace will hand over the data to the operation module for calculation and obtain the result result.
(3) Output module: Finally, the digital tube is used to display the data.
3. Design steps:
(1) First understand the circuit diagram and circuit diagram principles as well as the functions and applications of each pin of the chip, and then connect and test the circuit diagram.
(2) Based on the connection and understanding of Experiment 2 and Experiment 3, you can design the circuit diagram required for a question as shown in the figure above.
3. Experimental results and analysis
This is a picture of the word generator pins corresponding to the chip pin control functions:
(1) Generate arbitrary data and store it in the general register GR1.
Initialize the data command and open the data bus switch control and set it to 0---->The OC gate of the first 74374 is set to 0, and the CLK of the first 74374 is set to 1---->The data is saved in GR1
(2) Generate arbitrary data and store it in the general register GR2.
Initialize the data command and open the data bus switch control and set it to 0---->The OC gate of the second 74374 is set to 0, and the CLK of the second 74374 is set to 1---->The data is saved in GR2
(3) Complete GR1+GR2→GR1.
After completing the above two steps to store data, start computing data:
Then turn off the bus data switch and set it to 1---->Set the 744244 of the first 74374 to 0 and start working->Set the OC gate of A's 74244 to 0- --->A's 74244CLK is set to 1 ---->The first 74374's 74374 is set to 1 to shut down the operation ->A's 74244's OC gate is set to 1 ->The second 74374's 74244 is set to 0 to start working —>B’s 74244 OC gate is set to 0 —>B’s 74244CLK is set to 1 —>A’s 74244 OC gate is set to 1, A’s 74244 OC gate is set to 1---->Start computing ALU’s 74244 Set to 0, M=0, CN=1, s0–s3 are set to 1001 (key points)
(4) Complete GR1-GR2→GR2.
The steps are similar to the third question (but the last step needs to be modified) ------->Start calculating ALU and set 74244 to 0, M=0, CN=0, s0–s3 to 0110
(5) Complete GR1∧GR2→GR1.
The steps are similar to the third question (but the last step needs to be modified) ------->Start the calculation and set ALU's 74244 to 0, M=1, CN=0, and s0–s3 to 1101
(6) Complete GR1∨GR2→GR2.
The steps are similar to the third question (but the last step needs to be modified) ------->Start calculating ALU and set 74244 to 0, M=1, CN=0, s0–s3 to 0111
(7) Complete GR1⊕GR2→GR1.
The steps are similar to the third question (but the last step needs to be modified) ------->Start the operation and set 74244 of the ALU to 0, M=1, CN=0, and s0–s3 to 0110
(8)~GR1→GR2. ("-" means logical NOT operation)
The steps are similar to the third question (but the last step needs to be modified) ------->Start the operation and set the 74244 of the ALU to 0, M=1, CN=0, s0– s3 is set to 0000
(9)~GR2→GR1.
The steps are similar to the third question (but the last step needs to be modified) ------->Start the operation and set 74244 of ALU to 0, M=1, CN=0, s0–s3 to 1010
* [There is no process of sending the operation results to the register]
4. Summary and experience
Omitted