1、概述
PCI Express作为一种高带宽、低引脚数、串行、互连技术。它是为了取代旧的PCI和AGBus标准而设计的。PCIe比旧标准有许多改进，包括更高的最大系统总线吞吐量、更低的I/O引脚数和更小的物理占地面积、更好的总线设备性能扩展、更详细的错误检测和报告机制（高级错误报告，AER）以及本机热插拔功能。PCI Express体系结构为桌面平台提供了高性能I/O基础设施，传输速率从每秒2.5千兆字节开始，通过x1 PCI Express通道传输，用于千兆以太网、电视调谐器、火线1394a/b控制器和通用I/O。PCI Express体系结构为桌面平台提供了高性能图形基础设施，使现有AGP8x设计的能力翻了一番，图形控制器通过x16 PCI Express通道的传输速率为每秒4.0千兆字节。通道由两个差分信令对组成，其中一对用于接收数据，另一对用于发送。
ExpressCard采用PCI Express接口，由PCMCIA集团为移动计算机开发。PCI Express高级电源管理功能有助于延长平台电池寿命，并使用户能够在无交流电源的情况下随时随地工作。PCI Express电气接口也用于某些计算机存储接口SATA Express和M.2。
PCI Express在移动、企业和通信领域的广泛采用，通过重用通用互连技术实现了融合。
PCI-E是一种串行总线，它使用两个低压差分LVDS对，每个方向2.5Gb/s[一个发送对，一个接收对]。PCI Express支持1x[2.5Gbps]、2x、4x、8x、12x、16x和32x总线宽度[传输/接收对]。
上面引脚输出表中列出的差分引脚[通道]是LVDS，代表：低压差分信号。
2、PCI-Express 1x Connector Pin-Out
| Pin | Side B Connector |
Side A Connector |
||
| # | Name | Description | Name | Description |
| 1 | +12v | +12 volt power | PRSNT#1 | Hot plug presence detect |
| 2 | +12v | +12 volt power | +12v | +12 volt power |
| 3 | +12v | +12 volt power | +12v | +12 volt power |
| 4 | GND | Ground | GND | Ground |
| 5 | SMCLK | SMBus clock | JTAG2 | TCK |
| 6 | SMDAT | SMBus data | JTAG3 | TDI |
| 7 | GND | Ground | JTAG4 | TDO |
| 8 | +3.3v | +3.3 volt power | JTAG5 | TMS |
| 9 | JTAG1 | +TRST# | +3.3v | +3.3 volt power |
| 10 | 3.3Vaux | 3.3v volt power | +3.3v | +3.3 volt power |
| 11 | WAKE# | Link Reactivation | PERST# |
PCI-Express Reset signal |
| Mechanical Key |
||||
| 12 | RSVD | Reserved | GND | Ground |
| 13 | GND | Ground | REFCLK+ | Reference Clock Differential pair |
| 14 | HSOp(0) | Transmitter Lane 0, Differential pair |
REFCLK- | |
| 15 | HSOn(0) | GND | Ground | |
| 16 | GND | Ground | HSIp(0) | Receiver Lane 0, Differential pair |
| 17 | PRSNT#2 | Hotplug detect | HSIn(0) | |
| 18 | GND | Ground | GND | Ground |
3、PCI-Express 4x Connector Pin-Out
| Pin | Side B Connector |
Side A Connector |
||
| # | Name | Description | Name | Description |
| 1 | +12v | +12 volt power | PRSNT#1 | Hot plug presence detect |
| 2 | +12v | +12 volt power | +12v | +12 volt power |
| 3 | +12v | +12 volt power | +12v | +12 volt power |
| 4 | GND | Ground | GND | Ground |
| 5 | SMCLK | SMBus clock | JTAG2 | TCK |
| 6 | SMDAT | SMBus data | JTAG3 | TDI |
| 7 | GND | Ground | JTAG4 | TDO |
| 8 | +3.3v | +3.3 volt power | JTAG5 | TMS |
| 9 | JTAG1 | +TRST# | +3.3v | +3.3 volt power |
| 10 | 3.3Vaux | 3.3v volt power | +3.3v | +3.3 volt power |
| 11 | WAKE# | Link Reactivation | PERST# | PCI-Express Reset signal |
| Mechanical Key |
||||
| 12 | RSVD | Reserved | GND | Ground |
| 13 | GND | Ground | REFCLK+ | Reference Clock Differential pair |
| 14 | HSOp(0) | Transmitter Lane 0, Differential pair |
REFCLK- | |
| 15 | HSOn(0) | GND | Ground | |
| 16 | GND | Ground | HSIp(0) | Receiver Lane 0, Differential pair |
| 17 | PRSNT#2 | Hotplug detect | HSIn(0) | |
| 18 | GND | Ground | GND | Ground |
| 19 | HSOp(1) | Transmitter Lane 1, Differential pair |
RSVD | Reserved |
| 20 | HSOn(1) | GND | Ground | |
| 21 | GND | Ground | HSIp(1) | Receiver Lane 1, Differential pair |
| 22 | GND | Ground | HSIn(1) | |
| 23 | HSOp(2) | Transmitter Lane 2, Differential pair |
GND | Ground |
| 24 | HSOn(2) | GND | Ground | |
| 25 | GND | Ground | HSIp(2) | Receiver Lane 2, Differential pair |
| 26 | GND | Ground | HSIn(2) | |
| 27 | HSOp(3) | Transmitter Lane 3, Differential pair |
GND | Ground |
| 28 | HSOn(3) | GND | Ground | |
| 29 | GND | Ground | HSIp(3) | Receiver Lane 3, Differential pair |
| 30 | RSVD | Reserved | HSIn(3) | |
| 31 | PRSNT#2 | Hot plug detect | GND | Ground |
| 32 | GND | Ground | RSVD | Reserved |
4、PCI-Express 8x Connector Pin-Out
| Pin | Side B Connector |
Side A Connector |
||
| # | Name | Description | Name | Description |
| 1 | +12v | +12 volt power | PRSNT#1 | Hot plug presence detect |
| 2 | +12v | +12 volt power | +12v | +12 volt power |
| 3 | +12v | +12 volt power | +12v | +12 volt power |
| 4 | GND | Ground | GND | Ground |
| 5 | SMCLK | SMBus clock | JTAG2 | TCK |
| 6 | SMDAT | SMBus data | JTAG3 | TDI |
| 7 | GND | Ground | JTAG4 | TDO |
| 8 | +3.3v | +3.3 volt power | JTAG5 | TMS |
| 9 | JTAG1 | +TRST# | +3.3v | +3.3 volt power |
| 10 | 3.3Vaux | 3.3v volt power | +3.3v | +3.3 volt power |
| 11 | WAKE# | Link Reactivation | PERST# | PCI-Express Reset signal |
| Mechanical Keycard |
||||
| 12 | RSVD | Reserved | GND | Ground |
| 13 | GND | Ground | REFCLK+ | Reference Clock Differential pair |
| 14 | HSOp(0) | Transmitter Lane 0, Differential pair |
REFCLK- | |
| 15 | HSOn(0) | GND | Ground | |
| 16 | GND | Ground | HSIp(0) | Receiver Lane 0, Differential pair |
| 17 | PRSNT#2 | Hotplug detect | HSIn(0) | |
| 18 | GND | Ground | GND | Ground |
| 19 | HSOp(1) | Transmitter Lane 1, Differential pair |
RSVD | Reserved |
| 20 | HSOn(1) | GND | Ground | |
| 21 | GND | Ground | HSIp(1) | Receiver Lane 1, Differential pair |
| 22 | GND | Ground | HSIn(1) | |
| 23 | HSOp(2) | Transmitter Lane 2, Differential pair |
GND | Ground |
| 24 | HSOn(2) | GND | Ground | |
| 25 | GND | Ground | HSIp(2) | Receiver Lane 2, Differential pair |
| 26 | GND | Ground | HSIn(2) | |
| 27 | HSOp(3) | Transmitter Lane 3, Differential pair |
GND | Ground |
| 28 | HSOn(3) | GND | Ground | |
| 29 | GND | Ground | HSIp(3) | Receiver Lane 3, Differential pair |
| 30 | RSVD | Reserved | HSIn(3) | |
| 31 | PRSNT#2 | Hot plug detect | GND | Ground |
| 32 | GND | Ground | RSVD | Reserved |
| 33 | HSOp(4) | Transmitter Lane 4, Differential pair |
RSVD | Reserved |
| 34 | HSOn(4) | GND | Ground | |
| 35 | GND | Ground | HSIp(4) | Receiver Lane 4, Differential pair |
| 36 | GND | Ground | HSIn(4) | |
| 37 | HSOp(5) | Transmitter Lane 5, Differential pair |
GND | Ground |
| 38 | HSOn(5) | GND | Ground | |
| 39 | GND | Ground | HSIp(5) | Receiver Lane 5, Differential pair |
| 40 | GND | Ground | HSIn(5) | |
| 41 | HSOp(6) | Transmitter Lane 6, Differential pair |
GND | Ground |
| 42 | HSOn(6) | GND | Ground | |
| 43 | GND | Ground | HSIp(6) | Receiver Lane 6, Differential pair |
| 44 | GND | Ground | HSIn(6) | |
| 45 | HSOp(7) | Transmitter Lane 7, Differential pair |
GND | Ground |
| 46 | HSOn(7) | GND | Ground | |
| 47 | GND | Ground | HSIp(7) | Receiver Lane 7, Differential pair |
| 48 | PRSNT#2 | Hot plug detect | HSIn(7) | |
| 49 | GND | Ground | GND | Ground |
5、PCI-Express 16x Connector Pin-Out
| Pin | Side B Connector |
Side A Connector |
||
| # | Name | Description | Name | Description |
| 1 | +12v | +12 volt power | PRSNT#1 | Hot plug presence detect |
| 2 | +12v | +12 volt power | +12v | +12 volt power |
| 3 | +12v | +12 volt power | +12v | +12 volt power |
| 4 | GND | Ground | GND | Ground |
| 5 | SMCLK | SMBus clock | JTAG2 | TCK |
| 6 | SMDAT | SMBus data | JTAG3 | TDI |
| 7 | GND | Ground | JTAG4 | TDO |
| 8 | +3.3v | +3.3 volt power | JTAG5 | TMS |
| 9 | JTAG1 | +TRST# | +3.3v | +3.3 volt power |
| 10 | 3.3Vaux | 3.3v volt power | +3.3v | +3.3 volt power |
| 11 | WAKE# | Link Reactivation | PERST# | PCI-Express Reset signal |
| Mechanical Key |
||||
| 12 | RSVD | Reserved | GND | Ground |
| 13 | GND | Ground | REFCLK+ | Reference Clock Differential pair |
| 14 | HSOp(0) | Transmitter Lane 0, Differential pair |
REFCLK- | |
| 15 | HSOn(0) | GND | Ground | |
| 16 | GND | Ground | HSIp(0) | Receiver Lane 0, Differential pair |
| 17 | PRSNT#2 | Hotplug detect | HSIn(0) | |
| 18 | GND | Ground | GND | Ground |
| 19 | HSOp(1) | Transmitter Lane 1, Differential pair |
RSVD | Reserved |
| 20 | HSOn(1) | GND | Ground | |
| 21 | GND | Ground | HSIp(1) | Receiver Lane 1, Differential pair |
| 22 | GND | Ground | HSIn(1) | |
| 23 | HSOp(2) | Transmitter Lane 2, Differential pair |
GND | Ground |
| 24 | HSOn(2) | GND | Ground | |
| 25 | GND | Ground | HSIp(2) | Receiver Lane 2, Differential pair |
| 26 | GND | Ground | HSIn(2) | |
| 27 | HSOp(3) | Transmitter Lane 3, Differential pair |
GND | Ground |
| 28 | HSOn(3) | GND | Ground | |
| 29 | GND | Ground | HSIp(3) | Receiver Lane 3, Differential pair |
| 30 | RSVD | Reserved | HSIn(3) | |
| 31 | PRSNT#2 | Hot plug detect | GND | Ground |
| 32 | GND | Ground | RSVD | Reserved |
| 33 | HSOp(4) | Transmitter Lane 4, Differential pair |
RSVD | Reserved |
| 34 | HSOn(4) | GND | Ground | |
| 35 | GND | Ground | HSIp(4) | Receiver Lane 4, Differential pair |
| 36 | GND | Ground | HSIn(4) | |
| 37 | HSOp(5) | Transmitter Lane 5, Differential pair |
GND | Ground |
| 38 | HSOn(5) | GND | Ground | |
| 39 | GND | Ground | HSIp(5) | Receiver Lane 5, Differential pair |
| 40 | GND | Ground | HSIn(5) | |
| 41 | HSOp(6) | Transmitter Lane 6, Differential pair |
GND | Ground |
| 42 | HSOn(6) | GND | Ground | |
| 43 | GND | Ground | HSIp(6) | Receiver Lane 6, Differential pair |
| 44 | GND | Ground | HSIn(6) | |
| 45 | HSOp(7) | Transmitter Lane 7, Differential pair |
GND | Ground |
| 46 | HSOn(7) | GND | Ground | |
| 47 | GND | Ground | HSIp(7) | Receiver Lane 7, Differential pair |
| 48 | PRSNT#2 | Hot plug detect | HSIn(7) | |
| 49 | GND | Ground | GND | Ground |
| 50 | HSOp(8) | Transmitter Lane 8, Differential pair |
RSVD | Reserved |
| 51 | HSOn(8) | GND | Ground | |
| 52 | GND | Ground | HSIp(8) | Receiver Lane 8, Differential pair |
| 53 | GND | Ground | HSIn(8) | |
| 54 | HSOp(9) | Transmitter Lane 9, Differential pair |
GND | Ground |
| 55 | HSOn(9) | GND | Ground | |
| 56 | GND | Ground | HSIp(9) | Receiver Lane 9, Differential pair |
| 57 | GND | Ground | HSIn(9) | |
| 58 | HSOp(10) | Transmitter Lane 10, Differential pair |
GND | Ground |
| 59 | HSOn(10) | GND | Ground | |
| 60 | GND | Ground | HSIp(10) | Receiver Lane 10, Differential pair |
| 61 | GND | Ground | HSIn(10) | |
| 62 | HSOp(11) | Transmitter Lane 11, Differential pair |
GND | Ground |
| 63 | HSOn(11) | GND | Ground | |
| 64 | GND | Ground | HSIp(11) | Receiver Lane 11, Differential pair |
| 65 | GND | Ground | HSIn(11) | |
| 66 | HSOp(12) | Transmitter Lane 12, Differential pair |
GND | Ground |
| 67 | HSOn(12) | GND | Ground | |
| 68 | GND | Ground | HSIp(12) | Receiver Lane 12, Differential pair |
| 69 | GND | Ground | HSIn(12) | |
| 70 | HSOp(13) | Transmitter Lane 13, Differential pair |
GND | Ground |
| 71 | HSOn(13) | GND | Ground | |
| 72 | GND | Ground | HSIp(13) | Receiver Lane 13, Differential pair |
| 73 | GND | Ground | HSIn(13) | |
| 74 | HSOp(14) | Transmitter Lane 14, Differential pair |
GND | Ground |
| 75 | HSOn(14) | GND | Ground | |
| 76 | GND | Ground | HSIp(14) | Receiver Lane 14, Differential pair |
| 77 | GND | Ground | HSIn(14) | |
| 78 | HSOp(15) | Transmitter Lane 15, Differential pair |
GND | Ground |
| 79 | HSOn(15) | GND | Ground | |
| 80 | GND | Ground | HSIp(15) | Receiver Lane 15, Differential pair |
| 81 | PRSNT#2 | Hot plug present detect | HSIn(15) | |
| 82 | RSVD#2 | Hot Plug Detect | GND | Ground |
6、PCI express标准
6.1、PCI Express 1.0a
2003年，PCI-SIG推出了PCIe 1.0a，每通道数据速率为250 MB/s，传输速率为每秒2.5千兆传输（GT/s）。传输速率用每秒传输而不是每秒比特来表示，因为传输的数量包括开销比特，而开销比特不提供额外的吞吐量；PCIe 1.x使用8b/10b编码方案，导致原始信道带宽上有20%（＝2/10）的开销。
6.2、PCI Express 2.0版
PCI-SIG于2007年1月15日宣布推出PCI Express Base 2.0规范。与PCIe 1.0相比，PCIe 2.0标准的传输速率翻了一番，达到5 GT/s，每条通道的吞吐量从250 MB/s上升到500 MB/s。因此，32通道PCIe连接器（×32）可以支持高达16 GB/s的总吞吐量。PCIe 2.0主板插槽与PCIe v1.x卡完全向后兼容。PCIe 2.0卡通常也与PCIe 1.x主板向后兼容，使用PCI Express 1.1的可用带宽。总的来说，为v2.0设计的图形卡或主板将与v1.1或v1.0a兼容。与1.x一样，PCIe 2.0使用8b/10b编码方案，因此每个通道的有效传输速率为4Gbit/s，而原始数据速率为5GT/s。
6.3、PCI Express 2.1版
PCI Express 2.1（2009年3月4日发布）支持计划在PCI Express 3.0中全面实施的大部分管理、支持和故障排除系统。但是，速度与PCI Express 2.0相同。插槽功率的增加打破了PCI Express 2.1卡和一些1.0/1.0a的旧主板之间的向后兼容性，但大多数带有PCI Express 1.1连接器的主板都由制造商通过实用程序提供BIOS更新，以支持卡与PCIe 2.1的向后兼容性。
6.4、PCI Express 3.0接口
PCI Express 3.0规范于2010年11月发布。PCI Express 3.0规范的新功能包括一系列增强信令和数据完整性的优化，包括发射机和接收机均衡、PLL改进、时钟数据恢复以及当前支持的拓扑结构的信道增强。PCI Express 3.0将编码方案从以前的8b/10b编码升级到128b/130b，将带宽开销从PCI Express 2.0的20%降低到约1.54%（=2/130）。这是通过将已知的二进制多项式作为加扰器异或到反馈拓扑中的数据流来实现的。PCI Express 3.0的8 GT/s比特率可有效地为每条通道提供985 MB/s的传输速率，与PCI Express 2.0相比，通道带宽几乎翻了一番。
6.5、PCI Express 4.0
PCI Express 4.0于2017年正式发布，提供16 GT/s的比特率，使PCI Express 3.0提供的带宽翻倍，同时在软件支持和使用的机械接口方面保持前后兼容性。PCI Express 4.0规格还将引入OCuLink-2，这是Thunderbolt连接器的替代品。OCuLink版本2将具有高达16 GT/s（×4通道的总带宽为8 GB/s），而Thunderbolt 3连接器的最大带宽为5 GB/s。此外，还需要对有功和空载功率优化进行研究。