Always one process block is a block in Verilog. Always block statement is executed sequentially.
Syntax
always @ (event)
[statement]
always @ (event) begin
[multiple statements]
end
Always block executed at certain events. The event is defined by the sensitivity list.
What is the sensitivity list?
Sensitivity is a list of expressions that define when the block should be always performed, and after the specified brackets () in @ operator. The list may comprise one or a set of signals, and change the value to be performed always block.
In the code shown below, as long as the value of the signal a or b is changed, all statements always block.
// 每当“ a”或“ b”的值更改时，执行always块
always @ (a or b) begin
[statements]
end
In the following example, all statements always block is performed in each of the rising edge of the signal clk.
// Execute always block at positive edge of signal "clk"
always @ (posedge clk) begin
[statements]
end
What happens if there is no sensitivity list?
In the simulation process, always block continuously repeated. As long as the sensitivity of any signal changes in the list, it will always block the trigger. If the timing is not always block control statements, due to an infinite loop zero-delay simulation will hang!
Case
The following example shows a block Always, it attempts inverted value of signal clk. The statement 0 per time unit once. Therefore, since there is no delay in the statement, so it will always be executed.
// always block is started at time 0 units
// But when is it supposed to be repeated ?
// There is no time control, and hence it will stay and
// be repeated at 0 time units only. This continues
// in a loop and simulation will hang !
always clk = ~clk;
Even if sensitivity list is empty, there should also be other forms of time delay. As shown below, always the structure may be added by the simulation time delay statements. Now, every 10 clock time unit to complete a reversal.
always #10 clk = ~clk;
Note: Explicit logic gate delay can not be synthesized!
Therefore, the real Verilog design code always requires a sensitivity list.
