The STM32 multiplexing function

  Alternate function input division multiplexing, the multiplexed output, the STM32 chip integration of multiple modules, such as the GPIO, the serial port, I2C, etc., for the support of the IO port modules, the manufacturer of the IO port extend through the same port setting registers there are different functions. FIG IO structure below:

STM32 multiplexing functions performed by two high and low 32-bit registers are:

  (1) GPIO multiplexing function Low Register (GPIOx_AFRL)

  (2) GPIO multiplexing function High Register (GPIOx_AFRH)

 Multiplexing is a function register group 4, respectively AFL0 ~ AFL7, AFH8 ~ AFH15.

 AFL0 ~ AFL7 and is GPIOx0 ~ GPIOx7 correspondence, AFH8 ~ AFH15 and GPIOx8 ~ GPIOx15 one correspondence.

STM32 bottom and no AFRH AFRL register, the underlying array is encapsulated into a AFR [2], ARF [0] Representative AFRL register, AFR [1] Code AFRH register.

Example: The GPIOA9, GPIOA10 set multiplexing function, there are the following:

         GPIOA9, GPIOA10 respectively: GPIOA-> AFR [1] | = 7 << 4; GPIOA-> AFR [1] | = 7 << 8;     

     Note: AF7 7 represents, for the multiplexed data, 4 and 8 indicates the position of the multiplexed GPIO GPIOA9, GPIOA10 fall within the scope of AFH8 ~ AFH15.

IO port multiplexing function can query the "STM32f405,407xxx data sheet" multiplex table:

  

 

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Origin www.cnblogs.com/anSn/p/11614978.html