Road STM32 learning function --SystemInit

In "startup_stm32f429xx.s" file, the system reset function will first call SystemInit

 1 ; Reset handler
 2 Reset_Handler    PROC
 3                  EXPORT  Reset_Handler             [WEAK]
 4         IMPORT  SystemInit
 5         IMPORT  __main
 6 
 7                  LDR     R0, =SystemInit
 8                  BLX     R0
 9                  LDR     R0, =__main
10                  BX      R0
11                  ENDP

SystemInit function definition:

 1 void SystemInit(void)
 2 {
 3   /* FPU settings ------------------------------------------------------------*/
 4   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
 5     SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
 6   #endif
 7   /* Reset the RCC clock configuration to the default reset state ------------*/
 8   /* Set HSION bit */
 9   RCC->CR |= (uint32_t)0x00000001;
10 
11   /* Reset CFGR register */
12   RCC->CFGR = 0x00000000;
13 
14   /* Reset HSEON, CSSON and PLLON bits */
15   RCC->CR &= (uint32_t)0xFEF6FFFF;
16 
17   /* Reset PLLCFGR register */
18   RCC->PLLCFGR = 0x24003010;
19 
20   /* Reset HSEBYP bit */
21   RCC->CR &= (uint32_t)0xFFFBFFFF;
22 
23   /* Disable all interrupts */
24   RCC->CIR = 0x00000000;
25 
26   /* Configure the Vector Table location add offset address ------------------*/
27 #ifdef VECT_TAB_SRAM
28   SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
29 #else
30   SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
31 #endif
32 }

 

1. FPU set

1   /* FPU settings ------------------------------------------------------------*/
2   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
3     SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
4   #endif

__FPU_PRESENT used to determine whether the processor with FPU function
__FPU_USED used to determine whether to turn FPU function

If the processor has determined FPU function and the function is turned on FPU, set "SCB-> CPACR" (Coprocessor Access Control) register is 20 ~ 23 bit is 1.

 

CPACR use register may be enabled or disabled FPU. You can> CPACR be accessed through SCB-. 0 to 19 bits 24 to 31 second unimplemented bits, reserved bits, as shown:

 

 For Cortex-M4 processor, FPU coprocessor is defined as 11 and 10. Since other coprocessor is not present, and only CP10 and CP11 are available for FPU. When setting this register, CP10 and CP11 must be set the same.

 

CP10 and CP11 after reset to zero. In this configuration, low power consumption and allows the FPU is prohibited, before use, it is necessary to enable the FPU, the present step is generally performed within SystemInit function.

 

 2. RCC clock configuration Reset

 

 1   /* Reset the RCC clock configuration to the default reset state ------------*/
 2   /* Set HSION bit */
 3   RCC->CR |= (uint32_t)0x00000001;
 4 
 5   /* Reset CFGR register */
 6   RCC->CFGR = 0x00000000;
 7 
 8   /* Reset HSEON, CSSON and PLLON bits */
 9   RCC->CR &= (uint32_t)0xFEF6FFFF;
10 
11   /* Reset PLLCFGR register */
12   RCC->PLLCFGR = 0x24003010;
13 
14   /* Reset HSEBYP bit */
15   RCC->CR &= (uint32_t)0xFFFBFFFF;
16 
17   /* Disable all interrupts */
18   RCC->CIR = 0x00000000;

 

2.1 RCC-> CR (RCC clock control register) is set HSION the internal high-speed clock

2.2 RCC-> CFGR ( the RCC clock configuration register) is cleared

2.3 reset RCC-> CR (RCC  clock control register) is HSEON, CSSON PLLON bit and

2.4 reset RCC-> PLLCFGR ( the RCC the PLL configuration register  )

2.5 The RCC-> CR (RCC  clock control register) is HSEBYP reset

2.6 Disable all interrupts

 

3.  Configure the interrupt vector table address

1   /* Configure the Vector Table location add offset address ------------------*/
2 #ifdef VECT_TAB_SRAM
3   SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
4 #else
5   SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
6 #endif