Problem background
When reading the "Guide to Playing with STM32-F103 with Zero Dead Angle" and the chapter about FSMC in "STM32F10x-Chinese Reference Manual", regarding the pins used in control, the address was NOR/SRAMmentioned when referring to NOR devices. Multiplexing and non-multiplexing interfaces, I didn't understand what it was for a while.
in conclusion
非复用模式: 16-bit data lines and 26-bit address lines are used separately. It is recommended to use this mode on STM32 products with 144 pins and above.
复用模式: 低16位数据/地址线复用. In this mode, it is recommended to use address latches to distinguish data from addresses.
If the latch is not used: when NADV is low, the address signal Ax appears on ADx (x=0...15), and when NADV becomes high, the data signal Dx appears on ADx. If a latch is used: Ax and Dx can be obtained on ADx at the same time.
Reuse mode
1. For register configuration, firstly, pay attention to enabling address data multiplexing, and secondly, the memory type is FSMC_MemoryType_NOR, otherwise the NADV signal will not appear.
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Enable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;
2. Pay attention to the enabling of GPIO multiplexing function and clock enabling.
3. Address bus. When accessing in 16-bit mode, bits [25...0] of the access address must be shifted left one bit first. In order to correctly output the address signal, the reason is that STM32 will shift the address to the right by one bit and then output it. If the left shift is not performed before output, the output address will be incorrect. For example, when our software accesses the address 6000 0005H, the actual address accessed is 6000 0002H. Why shift one position to the right? See page 327 of the Chinese data sheet. as follows
