[[STM32--28--IO pin multiplexing function]]

Alternate functions of STM32–28–IO pins

STM32's IO multiplexing function.
What is multiplexing?
Let's first understand what is a general
IO port. The input or output is controlled by GPIO peripherals. We call it general
multiplexing:
The input or output of the IO port is controlled by other non-general IO ports. GPIO peripheral control is like the USART that is often said to be output by the DR register

IO multiplexing function of STM32
1. What multiplexing functions are supported by each IO
2. Conflict issues of IO multiplexing functions
IO can only be used as one multiplexing function at the same time, otherwise conflicts will occur
3. When encountering IO multiplexing Function conflict
Our solution is to consider using the remapping function, which will be explained in subsequent courses.
We know that the chip has many peripherals, and the pin resources are very limited. In order to solve this problem, the method is to
multiplex the pins, so that In addition to being ordinary IO ports, pins are also associated with some peripherals and
used Moreover, a pin not only has one multiplexing function, but has multiple second functions, but
Multiplexing of only one peripheral at a time is allowed to ensure no conflicts between peripherals sharing the same IO pin.
The role of the AFIO register is to multiplex function I/O and debug configuration. STM32F103ZET6 has a total of 6 AFIO
registers, event control register AFIO_EVCR, multiplexing remapping and debugging I/O configuration register AFIO_MAPR, external
interrupt configuration register AFIO_EXTICR1, external interrupt Configuration register AFIO_EXTICR2, external interrupt configuration register
AFIO_EXTICR3 and external interrupt configuration register AFIO_EXTICR4.

Multiplexing remapping and debugging I/O configuration register AFIO_MAPR register description
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When certain bits of the AFIO_MAPR register are written to implement pin remapping, at this time, the multiplexed functions are no longer mapped to their original allocation. For example, bit 2 of the AFIO_MAPR register is the remapping of USART1, set to 0: no remapping (TX/PA9, RX/PA10); set to 1: remapping (TX/PB6, RX/PB7). By default, PA9 and PA10 are used as the pins of serial port 1. If PA9 and PA10 are used elsewhere, but serial port 1 still needs to be used, then you can set bit 2 of AFIO_MAPR to 1 and change the pin of serial port 1. The feet are remapped to PB6 and PB7. This serial port initialization process has some changes. It needs to initialize the AFIO clock and set the second bit of AFIO_MAPR to 1. The rest is no different from the ordinary serial port configuration. The HAL library has already defined these configuration tasks. We only need to look for these reused macro definitions. These codes related to port reuse can be found in the stm32f1xx_hal_gpio_ex.h file.

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Origin blog.csdn.net/weixin_50965981/article/details/132638933