Chapter 4 ARM Assembly Language Programming
4.1 pseudo-op
ARM assembler language source statement by the instruction, and the operation of the pseudo macro components.
4.1.1 Symbol definition operation
Symbol definition ARM assembler operable to define the variables, variable assignment and defines a register name. Pseudo operations comprising:
GBLA, GBLL and GBLS
A global variable declaration ARM program, and initialize.
A declaration global arithmetic variable is initialized to 0
L declared global logical variables, initialized to {FALSE}
S declare global string variable is initialized to an empty string ""
Scope of global variables containing the variable source
variable LCLA，LCLL及LCLS
Declare local variables, initialized
A local arithmetic declare variables, initialized to 0
Declare variables local logic L, initialized to {FALSE}
Declare a local variable string S, is initialized to an empty string
One example of macro code range of action of a local variable containing the local variables
variable SETA, SETL 及 SETS
To the corresponding type of variable assignment
variable
expr RLIST
A general register list is defined name, the name may be used as defined in the LDM / STM instructions.
In LDM / STM instruction, the access order register list to access the register is always lower-numbered register, then accessing higher numbered register, regardless of the order of the registers in the register list.
name RLIST {list-of-registers}
CN register custom name for the coprocessor
expr the CN name (expr as coprocessor register number, value range 0 to 15)
CP is defined name coprocessor
expr the CP name (expr as coprocessor number, value range 0 to 15)
DN and SN
DN is defined double-precision VFP register name
SN single precision VFP register definition name
name DN expr
name SN expr
FPA floating-point register FN is defined name
name FN expr
4.1.2 Data Definition operation
include:
Start LTORG declare a data buffer pool
LTORG
The first address of a structured MAP define memory tables, synonyms ^
MAP expr { base-register}
FIELD memory definition of the structure of a data field of the table, synonymous #
{label} MAP expr
SPACE allocating a memory unit, and initialization with 0, synonyms%
{label} SPACE expr
DCB bytes of memory allocation unit section, and with the specified data initialization, synonym =
{label} DCB expr {expr}...
DCD and DCDU word memory unit allocated period, and with the specified data initialization, synonyms & DCD
{Label} DCD expr {expr} ...
DCD is possible to insert padding bytes prior to the first memory unit assigned to ensure that the memory allocation are aligned, DCDU required to be word aligned
DCDO memory cell word allocation period, and the contents of the unit cell is initialized to the amount of offset relative to the static base register R9
{label} DCD0 expr {,expr}...
And allocate a range DCFD DCFDU double word memory means, and initializes the data of double precision floating point. Each double-precision floating-point unit occupies two words
{label} DCFD{U} fpliteral {,fpliteral}...
DCFD possible to insert padding bytes allocated prior to the first memory unit geese guaranteed allocation memory is word aligned, DCFDU required to be word aligned
And allocate a range DCFS DCFSU word memory unit, floating-point data and single-precision initialized with
{label} DCFS{U} fpliteral {,fpliteral}...
DCI allocation section bytes of memory cells, with the specified initialization data, stored in the specified memory cell is the code, rather than data
In ARM code, the DCI allocate some memory cells word (memory allocation is self-aligned), and initializes with expr
In Thumb code, the DCI allocation period half word memory cell (memory allocation is self-aligned), and initialized with expr
{Label} DCI expr {, expr} ...
And allocate a range DCQ DCQU 8 bytes (double word) of memory cells, initialization of data and 64-bit integer, which is not word-aligned
{label} DCQ{U} {-}literal {,literal}...
DCW and DCWU assigned memory section half word unit, and with the specified data initialization, which do not halfword-aligned
{label} DCW expr {,expr}...
DATA with data in the code segment.
4.1.3 Assembly Control pseudo-operation
include:
IF，ELSE和ENDIF
The condition can be the section of the assembler language source code comprising program or excluded from the program. [IF is synonymous with pseudo operation, | synonyms ELSE pseudo operation] is synonymous ENDIF pseudo operation.
Example:
IF Version = "1.0" ;指令 ;伪指令 ELSE ;指令 ;伪指令 ENDIFWHILE及WEND
Example:
count SETA 1 WHILE count <= 4 count SETA count+1 ;code WENDMACRO and WEND
MACRO directive identifying macro definition beginning, MEND identified macro definition ends. MACRO is defined by a piece of code, called a macro definition, so that the program can be invoked by multiple macro code line segment.
grammar:
MACRO {$label} macroname {$parameter {,$parameter}...} ;code ... ;code MENDMEXIA
Jump out of the macro
4.1.4 stack dummy data frame described operation
4.1.5 Report pseudo-operation
ASSERT
In the second scan compilation program in assembler, which ASSERTION if the condition is not satisfied, ASSERT pseudo-operation will report the error message.
ASSERT logical expression
INFO
Support for reporting diagnostic information in the first pass compilation process or the second scan.
INFO numeric-expression,string-expression
OPT sets listing options
OPT n
TTL and SUBT
TTL pseudo-op to insert a title at the beginning of the list of files for each page, the pseudo-TTL operation will act on every page thereafter until it encounters a new pseudo-TTL operation
SUBT pseudo-op to insert a subtitle in the beginning of the list file for each page of the SUBT pseudo-op will act on every page thereafter until it encounters a new pseudo-operation SUBT
TTL title
SUB subtitle
4.1.6 Other pseudo-operation
ALIGN
By adding the current position of the byte enable the patch to meet certain alignment
ALIGN {expr{, offset}}
AREA
It is used to define a segment of code or data segment
AREA sectionname {attr} {attr}...
attr attributes include:
ALIGN=expression
ASSOC=section
CODE defined snippet
COMDEF define a generic segment, may contain code or data
COMMON define a generic section does not contain code or data
DATA definition data segment
This data indicates NOINIT segments retain only memory cells, but not the initial value written to memory unit
This read-only segment READONLY
READWRITE this paragraph readable and writable
CODE16 and CODE32
CODE16 tells the compiler back assembler instruction sequence of 16-bit Thumb instructions
CODE32 assembly instructions tell the latter sequence compiler 32-bit ARM instruction
END
Tells the compiler has come to the end of the source
ENTRY
Specify the program entry point
A program (can contain multiple source files) have at least one ENTRY, but a source file can have a maximum of one ENTRY
EQU
The EQU operation digits constants, and the reference value defined in the program register based on a character name. * EQU is a synonym
name EQU expr{type}
Value type:
CODE16
CODE32
DATA
EXPORT or GLOBAL
Declares a symbol that can be referenced by other documents, the statement is equivalent to a global variable.
EXPORT symbol {[WEAK]}
EXTERNAL
Tells the compiler that the current symbol is not defined in the source file, but defined in other source files, may refer to the symbol in the source file. If the file is not actually quoted the origin of the symbol, the symbol will not be added to source symbol table file.
EXTERN symbol {[WEAK]}
GET 或 INCLUDE
The file contains a source to the current source file, and the file is contained in the compilation process in its current position. GET INCLUDE is a synonym.
GET filename
IMPORT
Tells the compiler that the current symbol is not defined in the source file, but defined in other source files may be referenced in the origin of the symbol file, and regardless of whether the actual source file references the symbol, the symbol will be added to the origin symbol table file.
IMPORT symbol {[WEAK]}
INCBIN
The file contains a current source file, the file is not included in the compilation process
INCBIN filename
KEEP
Tells the compiler will include local symbols in the symbol table of the object file.
KEEP {symbol}
NOFP
Prohibit floating point instructions included in the source program.
REQUIRE
Interdependencies between specific segments
REQUIRE lable
REQUIRE8 及 PRESERVE8
The former indicates the current code claim 8 byte aligned data stack
The latter indicates that the current code number is 8-byte aligned stack
RN
Defined as a specific register names.
name RN expr
ROUT
Define local variables valid range for the
{name} ROUT
4.2 ARM assembler language directives
ADR (address reading small range directive)
ADRL (medium range address read directive)
The LDR (large range of address reading directive)
NOP No Operation directive
4.3 ARM assembly language statement format
{ symbol } { instruction | directive | pseudo - instruction} {; comment}
instruction: Instruction
pseudo-instruction: directive
symbol: Symbol
comment: Statement Notes
4.3.1 ARM assembler sign language
In ARM assembly language, the symbol can represent addresses, variables, and numeric constants. When the symbol time and referred to as address labels.
variable
Values of variables may change in the compilation process. In the ARM assembler language variables: numeric variables, string variables and logical variables
Numeric variables
In the ARM assembler, a numeric constant defined by EQU
Assembly time substitution of variables
If there is a $ character before the string variable, when the assembler will replace the variable with the string of the string variable value.
Grade
Reference numeral is a symbol or a data address instruction program. The generated reference embodiment can have three kinds:
PC-based label
Based reference register
Absolute address
Local label
Mainly used in the local area.
4.3.2 ARM assembler expression language
Expression is signed, numerical, or unary operators, and parentheses mesh thereof. Priority is as follows:
Highest priority expression in parentheses
Various operators have a certain priority
Adjacent the execution order by the unary operators left to right, unary higher priority than other operators
The same priority order of execution by binary operators left to right.
The elements of the expression:
String expression
Expression string by the string, string variables, operators, and parentheses.
Numerical expressions
Represented by the formula digital numeric constant, numeric variables, operators, and parentheses.
Register-based and PC-based expression
It represents the value of a register of plus (or minus) a numerical expression based on the expression register
PC-based expression represents the value of the PC register plus (or minus) a numeric expression
Logical expression
Logical expression by the logical volume, logical operators, relational operators, and parentheses. In the range {FALSE} and {TURE}
Some other operators
4.4 ARM assembly language program format
4.4.1 Assembly Language Programming Format
ARM assembly language in order to segment as the unit source file. Segments are relatively independent, with a particular name, indivisible instruction or sequence of numbers. Can be divided into segments of code and data segments, snippets of code storage, data storage segment data need to use the code runs.
ARM assembly language after compiling an executable image file, the executable image file include:
One or more code segments, code segments typically read-only
Zero or more data segments comprises an initial value. The data segments typically writable
Zero or more data segments does not contain an initial value. The data segment is initialized to 0, it is generally writable
The connector will be arranged according to certain rules corresponding to the respective segments of memory location. Relationship between adjacent middle is not necessarily the same as the relationship between the middle of the adjacent source and executable image file.
4.4.2 assembly language subroutine call
In ARM assembly language, the subroutine call instruction is completed by BL.
BL instruction complete two operations: the subroutine return address in registers LR, while PC is set into the first instruction register value of the target subprogram.
When the subroutine returns through register LR value is transferred to the PC register is achieved.
It is typically used to pass arguments registers R0 ~ R3 subroutine call and return results.
4.5 ARM assembler using compiler
ARM assembler ARMASM