ARM architecture and programming - Chapter VI

Chapter VI describes ATPCS

In order to separate between the C language compiler and assembler can call each other, it must provide certain rules for calls between subprograms. ATPCS is the basic rule ARM and Thumb program subroutine call

6.1 ATPCS Overview

The basic rules during usage rule comprises a subroutine call register, the usage rule data stack passing rules and parameters. Divided as needed

Support data stack limit checking ATPCS
Read-only support Dan system-independent (ROPI) of ATPCS
It supports read-write position independent segments (for RWPI) of ATPCS
ARM and Thumb program support mixed-use program ATPCS
Processing floating-point operations ATPCS

Assembly language subroutine must be met:

ATPCS must comply with the appropriate rules when writing subroutines
Using the data stack to comply with the appropriate rules ATPCS
Use -atpcs option in assembler

6.2 Basic ATPCS

It sets out some basic rules when the subroutine call, including:

Each register usage rule and its corresponding name
Stack usage rule data
Rule parameters passed

Execution speed compared to other ATPCS, to meet the basic ATPCS programs faster, the less memory. It does not provide support for the following:

ARM and Thumb program procedures call each other
Position-independent code and data support
Reentrancy subroutine
Check the data stack support

6.2.1 register usage rule

Subroutine to pass parameters via registers R0 ~ R3.
In the subroutine, using the register R4 ~ R11 to local variables
Register R12 is used as scratch registers between subroutines, denoted ip
As a data stack pointer register R13, denoted by sp
Register called register R14 is connected, referred to as lr
Register R15 is the program counter, denoted by pc

6.2.2 data stack usage rules

Position of the stack pointer, stack points to the top position is called FULL; available data unit when a point adjacent to the top of the stack, the stack is referred EMPTY

The stack growth direction, when the direction of the growth is reduced to the memory address, referred DESCENDING stack; growth increases when the direction of the memory address, referred ASCENDING stack.

4 kinds of data stack:

FD full diminishing
ED diminishing empty
FA full incremental
EA empty increments

6.2.3 parameter passing rules

A fixed number of parameters subroutine

If the system includes the hardware components of the floating-point arithmetic, floating-point transmission in accordance with the following rules:
- Each floating-point processing parameters in order
- FP floating point register is assigned to each parameter
- The method of allocation is satisfied and the floating point parameters require a minimum number of consecutive FP register set.
The first integer parameter, is transmitted through the register R0 ~ R3. Other parameters passed by the data stack.
A variable number of parameters subroutine

When no more than 4, can be passed parameter registers R0 ~ R3; 4 time-over, the stack data can also be used to pass parameters.
The results subroutine returns rules:
- When the result is 32-bit integer, may be returned through R0
- When the result is 64-bit integer, may be returned through R0 and R1, and so a
- When a floating-point result may be returned by the floating point registers f0 member, d0 or s0
- The result is a composite type float, can be returned by a register or f0 ~ fN d0 ~ dN
- For more bits of the result, it is necessary to pass through the memory.

6.3 Several specific ATPCS

6.3.1 supports data stack limit checking ATPCS

Fundamental

During stack checking data, using the data register as a stack pointer R10 limits, then referred to as SL and register R10. The user can not register in the control program.

This ATPCS to meet the following rules:
- It must have 256 bytes of space between the stack and the lowest low sl already occupied.
- The user can not modify the value sl in the program
- Stack data stack pointer sp value must not be less than the value sl
Support related compiler / assembler options:
- / Swst (software stack limit checking) compiler to generate code to support data ATPCS stack limit compliance checking
- / Noswst instructs the compiler generated code does not support data stack limit check
- / Swsna (software stack limit checking applicable) If the assembler stack checking whether the data does not matter, and the other is connected to the assembler program is specified options / swst or option / noswst, the time the option assembler / swstna
Written assembly

Ye Zizi program means that the program does not call other subroutines

Write support data stack limit checking APTCS assembler
- Less than 256 bytes of data in the stack Ye Zizi no data stack checking program
- Ye Zizi non-program data stack is less than 256 bytes using the following snippet
  
  ARM program
```
SUB sp, sp, #size  ;#size为sp和sl
CMP sp, sl
BLLO __ARM_stack_overflow
```
  Thumb program
```
ADD sp, #-size
CMP sp, sl
BLO __Thumb_stack_overflow
```
- Larger than 256 bytes of data subroutine stack
  
  In order to ensure the minimum value of sp not smaller than the address value of the memory cell data stack available, the corresponding register should be introduced
  
  ARM program
```
SUB ip, sp, #size
CMP ip, sl
BLLO __ARM_stack_overflow
```
  Thumb program
```
LDR wr, #-size
ADD wr, sp
CMP wr, sl
BLO __Thumb_stack_overflow
```

6.3.2 supports read-only section position-independent (ROPI) of APTCS

Support for read-only section position-independent (ROPI) of ATPCS applications

The program must be avoided in a specific location

Applications:
- During the program run dynamically loaded into memory
- Procedures on different occasions, and combinations of the different programs loaded into memory
- During operation mapped to different addresses.
Compliance ATPCS support read-only section position-independent (ROPI) of programming
- When the symbols are the same ROPI segment code references a ROPI segment must be PC-based
- When the reference sections of the code symbols ROPI another ROPI segment must be PC-based, and the positional relationship between the two sections must be fixed ROPI
- Other referenced in ROPI sections of the code must be an absolute address, or writable data based sb
- After ROPI segment is moved in a reference ROPI symbols to be adjusted

6.3.3 supports read-write position independent segments (for RWPI) of ATPCS

If a program in all of the read and write are position independent, called compliance program support APTCS read-write position-independent section (RWPI) of. Supports read-write position independent segments (for RWPI) of ATPCS avoid having to store the program to a specific location. R9 time generally as a static base register, denoted by sb. Reentrant subprogram may have multiple instances in memory. Examples of each independent segment can be read. When generating a new instance, sb point to read-write section of this example. The method of calculation RWPI segment symbol: calculated first connector with respect to the symbol period RWPI offset in a specific position, the specific location is typically selected at the first byte RWPI segment, the program runs, address of the symbol to generate the offset to the sb.

6.3.4 Support ARM Thumb program and program mix of ATPCS

When compile or assembly, use / interwork tells the compiler (or assembler) generated object code compliance program supports ARM and Thumb program mixed-use ATPCS, used in the following situations:

ARM Thumb program invokes the case of the presence of the program
Situation Thumb Procedure Call ARM program exists program
A case where the connector is required to ARM and Thumb state switching state of
In the following cases, the option / nointerwork
- The program does not include the Thumb program
- The user's own state switching ARM and Thumb

6.3.5 handle floating-point operations ATPCS

ATPCS supports two different floating-point hardware architectures and instruction sets VFP and FPA system. Code corresponding to the two systems are not compatible.