1.1 Electronic
The basic elements of electronic parts; the device is often composed of several elements, sometimes also referred to larger elements.
Elements include resistors, capacitors, inductors; means more diverse, with a bipolar transistor, field effect transistors, thyristors, semiconductor as resistors and capacitors.
Element no voltage, and converting the current control action; the device has control of the voltage, current, effect conversion (enlargement, switches, rectifier, detection, modulation and oscillation).
Reference: http://m.elecfans.com/article/589969.html distinguish elements and devices
1.2 Circuit
Analog circuit:
Analog signal processing circuit, such as a alternating voltage of the operational amplifier the amplified output a large AC voltage, the signal processing is continuously changed, as a continuous alternating current sine wave. Analog circuit operational amplifiers, modulation and demodulation circuit, oscillation circuit.
Gates: basic logic operations (with AND gates , OR gates , NOT gates , NAND gates , NOR gates , and NOR gate, XOR gate , etc. Several) unit circuit.
Digital circuits:
A circuit for processing digital signals, the signal processing circuit 0 is not representative of a low level, 0, 1, high, basic gate circuit is composed of the original . Because of its logical arithmetic and logic processing functions, it is also known as a digital logic circuit .
Depending on the characteristics of digital circuit logic functions, it can be divided into two categories:
One is called a combination logic circuit (abbreviated combining circuit), and the other is called the timing logic circuit (referred to as a sequential circuit).
Features in the combining circuit is an output logic function depends only on the input at any time of the time, regardless of the original state of the circuit.
The timing circuit is output at any time depends not only on the time of the input signal, but also on the original state of the circuit, or say, but also on the previous inputs. There trigger counters, registers, etc.
2. The machine language and decoder
Machine language is binary code representing the computer can be implemented, a set of machine instructions;
Machine language and decoder
Command (command register) = operation code (opcode decoder translated to operation of the controller) + address code (supplied to the address register);
Reference: http://m.elecfans.com/article/666558.html a difference between the read packet processors, cores, three chip concepts
Reference: https://blog.csdn.net/alianada/article/details/82142379 bottom of the computer what it is?
Reference: https://www.eefocus.com/mcu-dsp/402521/r0 also uses the ARM architecture, the processor Apple stronger than others Why the hell?
Reference: https://www.cnblogs.com/voidobject/p/3975552.html , What is the relationship (rpm) processor architecture, instruction set and assembly language of the three?
Reference: https://blog.csdn.net/p312011150/article/details/79612379 assembly instructions and machine code conversion
Reference: https://blog.csdn.net/dark_tone/article/details/52426886 instruction in the end what is? What is the machine code?
3. The instruction set architecture / microarchitecture
3.1 Intel instruction set
Intel had x86, SSE, AVX instruction set architecture, AMD has x86, x86-64,3D-Now! Instruction set.
x86 refers to a series based on the Intel 8086 and is backward-compatible instruction set
In 1971, Intel invented a world's first commercial microprocessor -4004, only 45 instructions , executed 50,000 instructions per second, the speed is only 108KHz, even smaller than in 1946, the world's first computer, ENIAC, but have to be much higher degree of integration, integrated transistors 2300, weighs less cup division.
In the Pentium 4 CPU, SSE2 instruction total 144,
SSE3 also a new addition of 13 new instructions for a video decoder, two threads for synchronization, and the rest for complex mathematical operations .
SSE4 has increased by 50 new help compiler, media, character / text processing program and point to an acceleration command.
Reference: http://www.360doc.com/content/15/0411/07/21966267_462329844.shtml brief history of the development of Intel CPU
Reference: https://baike.baidu.com/item/ Instruction Set / 238,130 instruction set
3.2 ARM instruction set
ARM There were three kinds of instruction sets: ARM instruction set , Thumb instruction set and the Thumb-2 instruction set. The specific use of what instruction set chip ARM V?
Reference: https://www.cnblogs.com/voidobject/p/3975552.html
Median OS / CPU architecture median / instruction set of bits / upward compatible
The median is the operating system on which it depends, said the number of bits instruction set.
32-bit CPU: a data bus (Databus) has 32 data bits ALU can handle.
Down (before) compatible
Forward-compatible CPU, 64-bit CPU is compatible with 32-bit instruction set, so the 64-bit 32-bit CPU can run the operating system.
32-bit 16-bit instruction set compatible CPU, the CPU can run 32-bit 16-bit operating system.
How backward compatibility?
64-bit cpu from over 16 development is still x86 architecture, principles and basic instructions are the same.
- bits 16; 16-bit code is compiled
- mov eax, 1; machine code is: 66 b8 01 00 00 00
16 is programmed using the 32-bit register, the compiler will automatically add default operand-size override prefix (the default operand size override prefix).
- bits 32; 32-bit code is compiled
- mov eax, 1; machine code is: b8 01 00 00 00
Compilation of statements of this code is exactly the same, except for the 32-bit code and compiled machine code which is not the same.
操作64位寄存器的低32位，高32位会清0，例如mov eax, 0FFFFFFFCH,则整个寄存器为00000000FFFFFFFCH，高32位会被清0。
Reference: https://zhidao.baidu.com/question/329146909.html register how backward compatible?
Reference: http://book.51cto.com/art/201210/359658.htm general register
Reference: https://zhidao.baidu.com/question/2011537345660325628.html the CPU median, median OS
Instruction set of CPU selected language, the microarchitecture of specific implementations.
3.3 microarchitecture
Computer language "instruction set architecture" vs. Execution Language carriers of "micro-architecture processor core."
Can not decide instruction set architecture, x86 instruction set can also use the ARM architecture.
| Instruction set version | Microarchitecture | use |
| ARM V1 | ARM1 | |
| ARM V2 | ARM2, ARM3 | |
| ARM V3 | ARM6, ARM7 | |
| ARM V4 | StrongARM, ARM7TDMI, ARM9TDMI | |
| ARM V5 | ARM7EJ, ARM9E, ARM10E, XScale | |
| ARM V6 | ARM11, ARM Cortex-M | |
| ARM V7 | ARM Cortex-A, ARM Cortex-M, ARM Cortex-R | |
| ARM V8 | ||
| ARM V9 |
ARM推出的通用的架构，缓存(cache)就是在内核中的，这些内核又名公版架构。
3.4 ARM授权模式
ARM提供三类CPU授权：
参考：https://blog.csdn.net/weixin_34146805/article/details/85779161 ARM介绍2：授权模式
3.4.1 指令集架构授权
ARM提供指令集以及设计规范。
2016年，三星发布了Exynos8 Octa 8890（Octa代表8核），这是三星第一款拥有自研架构的ARM芯片
自研架构=自研微架构≈cortex-A53，A73（公版微架构）
高通，基于ARM v7深度开发自己的处理器微架构。
苹果，基于ARMv7开发Swift微架构。
3.4.2软核授权
ARM提供CPU设计源代码，不允许更改，且不能剽窃。
多数厂商选择直接购买ARM CPU内核设计方案，然后与其它组件（比如GPU、多媒体处理、调制解调器等等）整合，制造出完整的SoC片上系统。
参考：
https://blog.csdn.net/baidu_35679960/article/details/77606930 指令集架构、arm内核、SoC、处理器、CPU、GPU等的关系
https://blog.csdn.net/zzx1045917067/article/details/78575259 ARM 指令集版本和ARM 版本
3.4.3硬核授权
ARM公司不提供设计源代码，提供类似于二进制代码的网表。
4.汇编语言与编译器
汇编语言：用助记符代替机器指令的操作码，用地址符号或标号代替指令或操作数的地址。
汇编语言和机器语言指令集是一一对应的,不同平台之间不可直接移植。
指令集架构（ISA）:规定了处理器如何识别这些汇编指令，以及如何与上层交互，区分软件和硬件的界限。芯片的软件部分。指令集中的每一条指令对应着一条汇编指令和固定的实现电路，程序设计最小语言单位。
如add r1, r2, r3，
在XX指令集，1010代表add，所以这条指令的指令码部分就是1010，
但XX指令集，0000代表add，所以同样的二进制串在不同的指令集下有不同的解读。
在不同的汇编语言里它有不同的意思，有可能是代表r1=r2+r3 , 也有可能是代表r3=r2+r1。
参考：https://www.cnblogs.com/voidobject/p/3975552.html
参考：https://blog.csdn.net/qq_34322603/article/details/75276415
参考：https://blog.csdn.net/yangtalent1206/article/details/6247607?utm_source=jiancool
汇编语言和机器语言机器移植性差，因为针对特定指令系统，不同的CPU汇编语言和机器语言不能通用。
汇编语言和机器语言程序结构性差，不便于模块化设计，也造成可移植性差。
指令集架构是专利，不是版权。
ARM有ARM V1~V8指令集结构，（V8是指指令集版本号，ARM architecture）。