Makefile rules in

The basic rule makefile format

　　A makefile rule consists of the following components:

target ... : prerequisites ...
　　recipe
　　...
　　...

　　Please note: you need to put a tab character at the beginning of every recipe line!

 

 

　　makefile does not specify which part of the execution time, the first target will be the ultimate goal of the command line, code generation shown below will end after test_1.o.

$ cat makefile 
test_1.o : test_1.c
    gcc -c test_1.c
test_2.o : test_2.c
    gcc -c test_2.c

　　As shown in the code below, the first line generated test_1.o, test_2.o provide rules. In other words, target of the first line will not be a goal, goal is all.

$ cat makefile 
%.o : %.c
    gcc -c -O2 $<

all : test_1.o test_2.o clean: rm *.o

 

makefile rule hiding eggs

　　When the final goal and prerequisites in one file with the same name, it will automatically generate a link to the file name of the executable file name.

$ cat Makefile 
TEST_1 := test_1.o

TEST_2 := test_2.o

test_1: $(TEST_1) $(TEST_2)

clean:
    rm *.o

　　When a target partition specified multiple times prerequisites , the specified multiple times prerequisites are involved in the generation target.

$ Cat Makefile 
review: test_1.o 
review: test_2.o 

review: test.o

 

makefile rule in special target (GNU makefile 4.8)

　　Some names have special significance as a target.

• .EXPORT_ALL_VARIABLES shows a lower layer to transfer all variables makefile