Makefile Learning 7 - Static Pattern Rules and Dynamic Library Compilation

I. Introduction

        This article takes a Makefile compiled by a dynamic library as an example to explain the use of static mode rules in make, deepen the study of Makefile in all aspects, and achieve the purpose of applying what you have learned.

2. Static mode rules

1. Grammar

TARGETS ...: TARGET-PATTERN: PREREQ-PATTERNS ...
    COMMANDS
    ...

        As can be seen from the grammar rules above, static pattern rules contain three parts: TARGETS , TARGET-PATTERN and PREREQ-PATTERNS .

TARGETS : Lists a list of target files for this rule , can contain wildcards.

TARGET-PATTERN : target pattern. Generally, "%" is included, where "%" can match any part of the target file, and the matching part is called "stem". In addition, the target file and the rest of the target pattern must match exactly, for example:

Object file: foo.o

Object pattern: % .o

stem: foo -> pattern matches

Object file: foo.c

Object pattern: % .o

stem:none -> pattern does not match

PREREQ-PATTERNS : Dependency patterns. The dependency files for each target are obtained using the "stem" of the target pattern instead of the "%" in the dependency pattern. Examples are as follows:

Object file: foo.o

Object pattern: %.o

Target dependency: %.c

        According to the target file foo.o and the target dependency %.o, it can be concluded from the above introduction that the "stem" is "foo", so % in the target dependency %.c can be replaced by foo, so the target dependency is foo.c.

2. Examples

objects = foo.o bar.o

all: $(objects)

$(objects): %.o: %.c
	$(CC) -c $(CFLAGS) $< -o $@

        According to the explanation of the above grammar, it can be known that the target file of the Makefile is foo.o bar.o, the target mode is %.o, and the target dependency is %.c. According to the target file and target mode, the "stem" is foo and bar, so the target mode is foo.o and bar.o, and the target dependency is foo.c and bar.c. So, equivalent to the following rules:

foo.o : foo.c
	$(CC) -c $(CFLAGS) foo.c -o foo.o
	
bar.o : bar.c
	$(CC) -c $(CFLAGS) bar.c -o bar.o

2. Examples of dynamic library compilation

1. Code structure

├── include
│   ├── a.h
│   ├── b.h
│   ├── c.h
│   └── d.h
├── obj
└── src
    ├── a.c
    ├── b.c
    ├── c.c
    └── d.c

2. Purpose

        Compile all the C language files in src into a libtest.so dynamic library, and put the compiled object files and libraries in the obj directory.

3. Makefile writing

INCDIR := include
SRCDIR := src
OBJDIR := obj
TARGET := libtest.so

SRCS := $(wildcard $(SRCDIR)/*)
OBJS := $(SRCS:$(SRCDIR)/%.c=$(OBJDIR)/%.o)

CFLAGS += -Wall -g -I include -fPIC
LDFLAGS += -fPIC -shared

$(OBJDIR)/$(TARGET):$(OBJS)
	gcc $(LDFLAGS) $^ -o $@ 

$(OBJS):$(OBJDIR)/%.o:$(SRCDIR)/%.c
	@mkdir -p $(OBJDIR)
	gcc $(CFLAGS) -c $< -o $@

.PHONY:clean 
clean:
	@rm -rf $(OBJDIR)/*

        The above example ( $(OBJS):$(OBJDIR)/%.o:$(SRCDIR)/%.c ) uses the static mode rules of Makefile, where OBJS is the object file (obj/ao obj/co obj/ bo obj/do), and $(OBJDIR)/%.o is the target mode (obj/%.o), so the "stems" are a, b, c and d respectively, and the target dependencies are src/ac, src /bc, src/cc, and src/dc. The function of this piece of code is to compile each C language file into an object file respectively.

        Finally, the $(OBJDIR)/$(TARGET):$(OBJS) rule compiles all object files into the final dynamic library.

3. Summary

        This article explains the use of static pattern rules in Makefile, and deepens the understanding of static pattern rules through an example of dynamic library compilation.