1. What is Makefile
Makefile
Document describes Linux
the system C/C++
compilation rules of the project, which is used to compile the automation C/C++
project. Once the writing is good writing Makefile
papers, only one make
command, the whole project will begin automatically compiled, no longer need to manually execute GCC
the command. In a large C/C++
source files of the project there are hundreds, according to their functions, modules, types were placed in different directories, Makefile
file defines a set of rules that indicates the order of compilation of the source file dependencies, the need to re Compile and so on.
Makefile
It can be simply regarded as the compilation rules of a project file, describing the compilation and linking rules of the entire project. It includes those files that need to be compiled, those files that do not need to be compiled, those files that need to be compiled first, those files that need to be compiled later, those files that need to be rebuilt, and so on. Compile the entire project needs involved, in Makefile
both can be described. In other words, it Makefile
can make the compilation of our project project automated, without having to manually input a bunch of source files and parameters every time.
2. Why use Makefile
To Linux
lower the C
language development as an example to explain the specific, multi-file compiler generates a file, the compiler command is as follows:
gcc -o outfile name1.c name2.c ...
outfile
The name of the executable program to be generated is the name nameN.c
of the source file. This is what we Linux
use at gcc
compiler to compile C
the sample files. If the number of source files we encounter is not very large, we can choose this compilation method. If there are too many source files, you will encounter the following problems.
2.1 The problem of linking libraries when compiling
Here are some standard libraries that we need to link manually:
name1.c
Uses math librarymath
functions, we have to manually add parameters-lm
;name4.c
Use a small databaseSQLite
function, we have to manually add parameters-lsqlite3
;name5.c
When threads are used, we need to manually add parameters-lpthread
;
Because there are many files, many third-party libraries have to be linked. So the command will be very long when compiling, and we may be involved in the order of file linking when compiling, so manual compilation will be very troublesome.
If we learn to use Makefile
not the case, it would radically simplify the operation of the compiler. To link the library file in Makefile
, the development of appropriate rules and corresponding link order. So just need to execute make
the command, the project will automatically compile a manual compilation of parameter options and commands omitted, very convenient.
2.2 Compiling large projects will take a long time
Makefile
Supporting multi-threaded concurrent operation will greatly shorten our compilation time, and when we modify the source file, when compiling the entire project, the make
command will only compile the files we have modified, and the unmodified files do not need to be recompiled. Greatly solved our time-consuming problem.
And file Makefile
only needs to be done once, usually we just do not add a file or delete the project, Makefile
basically do not have to modify, compile-time use only one make
command. It provides us with great convenience and greatly improves the efficiency of compilation.
3. Makefile rules
Its rules are mainly composed of two parts, the dependency relationship and the executed command, and its structure is as follows:
targets : prerequisites
command
or
targets : prerequisites; command
command
The relevant instructions are as follows:
targets
: The target of the rule is a must, it can beObject File
(generally called an intermediate file), it can be an executable file, or it can be a label;prerequisites
: Our dependence file to generatetargets
a file or a desired target. There can be multiple, separated by spaces, or none;command
:make
Command (you need to perform any of theshell
commands). There can be multiple commands, each command occupies one line;
If command
too long, you can use \
a newline.
Note: To use a colon between our goals and dependent files are separated, the start command must use the
Tab
keys, you can not use the spacebar.
To briefly summarize Makefile
the content in, it mainly contains five parts, namely:
3.1 Explicit rules
Explicit rules explain how to generate one or more object files. This is caused by Makefile
the writers clearly pointed out that the resulting file, file dependencies, generated commands.
3.2 Obscure rules
As our make
name with automatic derivation function, so obscure rules allow us to briefly write rough ground Makefile
, which is make
supported command.
3.3 Definition of variables
In the Makefile
middle we have to define a set of variables, which are generally strings, this is a bit like the C language macros, when Makefile
executed, where the variables will be extended to the corresponding reference position.
3.4 Document instructions
Which comprises three parts, one is a Makefile
reference to the other Makefile
, as in the C language include
as; refers to the other cases in accordance with certain specified Makefile
valid portion, as precompiled C language #if
the same; and It is to define a multi-line command.
3.5 Notes
Makefile
Only in-line comments, and UNIX
of Shell
the same scripts which the comment is #
characters, if you want your Makefile
use of #
characters can be escaped by a backslash, such as: \#
.
3.6 Wildcards in rules
*
Represents any one or more characters?
Represents any character[...]
[abcd] represents any character in a, b, c, d, [^abcd] represents a character other than a, b, c, d, [0-9] represents any number from 0 to 9~
Represents the user's home directory
4. Makefile example
main.cpp
Code:
#include <iostream>
int main()
{
std::cout << "hello,world" << std::endl;
return 0;
}
Specifically by the following examples about the use of Makefile
rules Makefile
file, add the following code:
main: main.cpp
g++ main.cpp -o main
Which main
is the target file, and our resulting executable file. Dependent files that main.cpp
operation of the source files, object files need to do to rebuild that g++ main.cpp -o main
. This is the Makefile
use of basic grammar rules.
Use
Makefile
way: First you need to write a goodMakefile
file, and then execute the shellmake
command, the program will automatically execute, get the final destination file.
wohu@ubuntu:~/cpp/demo$ ls
main.cpp `Makefile`
wohu@ubuntu:~/cpp/demo$ make
g++ main.cpp -o main
wohu@ubuntu:~/cpp/demo$ ls
main main.cpp `Makefile`
wohu@ubuntu:~/cpp/demo$ ./main
hello,world
wohu@ubuntu:~/cpp/demo$
If the space bar is used at the beginning of the command, an error will be reported
Makefile:2: *** missing separator. Stop.
Makefile
: 2 for the second line error, should Tab
begin.
5. Makefile process
When we execute make
when the command, make
will be performed to look for compiling the rules under the current file, which is Makefile
file. We write the Makefile
name of the file when you can use GNUMakefile
, makefile
, Makefile
, make
to go back to look for when performing Makefile
file, find the file sequence is like this.
Recommended to use Makefile
(usually written in this way in the project, the uppercase will be more standardized). If the file does not exist, an make
error will be reported to us, prompting:
make: *** No targets specified and no `Makefile` found. Stop.
In Makefile
adding the following code:
main: main.o name.o greeting.o
g++ main.o name.o greeting.o -o main
main.o: main.cpp
g++ -c main.cpp -o main.o
name.o: name.cpp
g++ -c name.cpp -o name.o
greeting.o: greeting.cpp
g++ -c greeting.cpp -o greeting.o
When we compile the project file, by default, make
execution is the Makefile
first rule (the Makefile
first dependencies appear), the first objective of this rule is called the "ultimate goal" or "ultimate goal" .
In the shell
command line of the make
command, you can get executable files main
and intermediate files main.o
, name.o
and greeting.o
, main
that is our final document to be generated.
By Makefile
can find our target main
in Makefile
the first goal, so it is the make
ultimate goal, when the modified any files, execute make
will rebuild the ultimate goal main
.
Its specific work order is: when shell
the input prompt make
subsequent command. make
Read in the current directory Makefile
files, and Makefile
file first goal as "ultimate goal" of its execution, start processing the first rule (rule where the ultimate goal).
In our example, the first rule is the goal of main
the rules is located. Rules describe the main
dependencies and define the link .o
file generation target main
command; make
before executing this command rules defined by the first processing target main
all dependent files (those examples of the .o
file) update rule (these .o
files Target rules).
These .o
targeting rules dealing with the following three cases file:
- Target
.o
file does not exist, create it using its description rules; - Target
.o
file exists, the target.o
file is dependent on ".cpp" source ".h" file of any target ratio.o
"Update" file (last make after being modified), then re-compiled rules according to which; - Target
.o
file exists, the target.o
file than any one of its dependencies ( ".c" source, ". H" file) "Update" (It depends on the file has not been modified after a make over), do nothing ;
Through the above update rules we can understand the role of the intermediate file, which is generated when compiling .o
the file. The function is to check whether a certain source file has been modified, and whether the final target file needs to be rebuilt.
We execute make
command, only the modified source files or nonexistent target file will be rebuilt, but those files are not changed without recompiling, so to save time in large part, to improve programming efficiency.