USB, UART, SPI bus, etc. Rate (rpm)

1. USB bus

With 
USB1.1: --- low speed mode (Low Speed): 1.5Mbps 
--- full speed mode (Full Speed): 12Mbps 
USB2.0: backwards compatibility. Increased high-speed mode, the maximum rate of 480Mbps. 
--- high-speed mode (High Speed): 25 ~ 480Mbps 
USB3.0: backward compatible. 
--- super speed: theoretically up to 4.8Gbps, about 10 times the actual, that is a high speed.

2. UART

RS232: not more than 20Kbps transmission rate, a low rate, anti-interference ability, RS-232C can not exceed the maximum transmission distance of 15m (50 feet).

RS422: defines a balanced communication interfaces, will increase the transmission rate to 10Mbps, the transmission distance is extended to 4,000 feet (when the rate is below 100Kbps), and allowing up to 10 receivers on a balanced bus. RS-422 is a stand-alone transmission, receives the multi-way, balanced transmission standard, was named TIA / EIA-422-A standard.

RS485: increased multipoint, two-way communication capability, which allows multiple transmitters connected to the same bus, while increasing the driving capability of transmitting and conflict protection features and the extended bus common mode range, named after the TIA / EIA -485-A standard. Maximum transfer rate of 10Mbps, anti-interference ability, can pass from 1.5km.

Balanced twisted pair transmission rate is inversely proportional to the length, at a rate of 100Kbps or less, it is possible to use a predetermined maximum cable length. Only in a very short distance in order to obtain the highest rate of transmission. In general, 100 m long twisted maximum transmission rate of only 1Mbps.

3. SPI bus

Full-duplex communication, the transmission rate of up to several Mbps level, faster than I2C.

4. I2C bus

Half-duplex, only two lines. Data and clock lines. 
--- standard speed: 100kbps 
--- Fast mode: 400kbps 
--- high-speed mode: 3.4Mbps

5. Ethernet, which is usually the network speed.

--- Early Ethernet transmission rate is only 10Mbps. 
--- Fast Ethernet: a theoretical maximum of 100Mbps. 
--- Gigabit Ethernet: the theoretical maximum 1Gbps.

    1. SD bus: Maximum capacity of 10Mbps.

    2. SATA interface: 
      --- SATA1.0: theoretical transmission speed is 150MB / s (or 1.5Gb / s), it actually 30MBps. 
      --- SATA2.0: 300MBps, namely 3Gbps. Actually it 80MBps. 
      --- SATA3.0: 600MBps, namely 6Gbps. 
      --- eSATA: theoretical transfer rate up to 1.5Gbps or 3Gbps.

    3. PCI bus 
      --- PCI: 32 bit, 33MHz clock frequency, the rate is 33 * 4 = 133MBps, i.e. 1Gbps. 
      --- PCI 2.1: 64 bit, 66MHz clock frequency is: rate is 66 * 8 = 528MBps, i.e. 4Gbps.

    4. E-the PCI: 
      the PCI Express bus frequency 2500 MHz, which is the reference frequency of 100 MHz (Phase Lock Loop, PLL) phase locked loop oscillator by achieved. 
      Serial bus bandwidth (MB / s) = serial bus clock frequency (MHz) * serial bus width (bit / 8 = B) * serial bus line * * encoding each clock transfer several sets of data (Cycle) 
      - -PCI Express x1 is a bus width, bus frequency 2500 MHz, is a serial bus line, two sets of data per clock transmission, coding of 8b / 10b, which is bandwidth of 476.84 MB / s, i.e., 3814.7 Mbps . (3.75 times the bandwidth of the PCI.) 
      Formula is 2500000000 (Hz) * 1/8 (bit ) * 1 ( pipeline) * 8/10 (bit) * 2 ( 2 sets of data transfer per clock) = 500000000 B / s = 476.8371582 MB / s, i.e. 3814.6972656 Mbps. 
      Bandwidth given below of other types of combinations. 
      --PCI Express x2 bandwidth of 953.68 MB / s, i.e., 7629.4 Mbps. (This mode is used only for the motherboard rather than internal interface slot mode) 
      - PCI Express x4 Bandwidth is 1907.36 MB / s, i.e. 15258.9 Mbps. 
      --PCI Express x8 bandwidth is 3814.72 MB / s, i.e. 30517.8 Mbps. 
      --PCI Express x16 bandwidth is 7629.44 MB / s, i.e. 61035.5 Mbps. (AGP 8X bandwidth of 3.75 times.) 
      --PCI Express x32 bandwidth 15258.88 MB / s, i.e. 122071 Mbps.

    5. XGMII / XLGMII / CGMII 
      in the Ethernet standard, 10Gbps / 40Gbps / 100Gbps rate level between the MAC layer and the PHY layer interfaces respectively corresponding to XGMII / XLGMII / CGMII, since XGMII / XLGMII parallel bus, and uses single-ended signal, HSTL level, the maximum transmission distance is only 7cm. Therefore, in practical applications, XGMII / XLGMII substantially Alternatively XAUI / XLAUI. XAUI / XLAUI is a four channel serial bus uses differential signal, CML logic transmissions, and performs a scrambling code, greatly enhancing the immunity performance signals, such that the effective transmission distance increases signal 50cm. 
      XAUI / XLAUI in the physical structure is the same, independent of the transceiver channels, each of the four pairs of differential signal lines. For XAUI bus, a data rate for each differential line 3.125Gbps, 12.5Gbps total data bandwidth, effective bandwidth of 12.5Gbps * 0.8 = 10Gbps (XAUI bus as a data 8B / 10B conversion before transmission, coding efficiency 80%).

    6. https://blog.csdn.net/ss343fd/article/details/54880037

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Origin www.cnblogs.com/erhu-67786482/p/10965916.html