FPGA-based image median filter development, including tb test files and matlab verification code

Table of contents

1. Preview of algorithm operation renderings

2.Algorithm running software version

3. Some core programs

4. Overview of algorithm theory

5. Algorithm complete program engineering

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1. Preview of algorithm operation renderings

Call the FPGA simulation results through MATLAB to display the filtering effect:

2.Algorithm running software version

vivado2019.2

matlab2022a

3. Some core programs

`timescale 1ns / 1ps
//
// Company: 
// Engineer: 
// 
// Create Date: 2022/07/28 01:51:45
// Design Name: 
// Module Name: test_image
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//

module test_image;

reg i_clk;
reg i_rst;
reg [7:0] tmps [0:100000];
reg [7:0] Images;
wire [7:0] o_medfilter;
integer fids,idx=0,dat;
 
//D:\FPGA_Proj\FPGAtest\code\test0N.bmp 路径改为自己的路径 

initial 
begin
	fids = $fopen("D:\\FPGA_Proj\\FPGAtest\\code\\test0N.bmp","rb");
	dat  = $fread(tmps,fids);
	$fclose(fids);
end
 
initial 
begin
i_clk=1;
i_rst=1;
#1000;
i_rst=0;
end 

always #5  i_clk=~i_clk;
 
always@(posedge i_clk) 
begin
	Images<=tmps[idx];
	idx<=idx+1;
end
 

med_filter med_filter_u(
.i_clk      (i_clk),
.i_rst      (i_rst),
.i_images   (Images),
.o_medfilter(o_medfilter)
);

integer fout1;
initial begin
 fout1 = $fopen("medfilter.txt","w");
end

always @ (posedge i_clk)
 begin
    if(idx<=67131)
	$fwrite(fout1,"%d\n",o_medfilter);
    else
    $fwrite(fout1,"%d\n",0);
end

endmodule
0X_002m

4. Overview of algorithm theory

          FPGA-based image median filtering is a commonly used filtering technology in image processing. Its principle is to smooth out the noise in the image through a certain algorithm while retaining as much detail information as possible in the image. This technology is mainly used in image noise reduction, image enhancement and other fields. Median filtering is a nonlinear signal processing technique. Its principle is to set the value of each pixel in the image to the median value of the neighboring pixel values ​​around the point. Specifically, for a pixel point, its filtered value is equal to the median value of the sorted neighbor pixel values ​​around the point. This filtering method can effectively remove salt and pepper noise, isolated points, etc. in the image, while retaining the edge information of the image.

        In FPGA-based image median filtering, FPGA, as a hardware platform, can achieve high-speed parallel computing, thereby improving filtering efficiency. Usually, a special median filter module is designed on the FPGA, which contains a comparator and memory for sorting.

The mathematical expression of median filtering is:

Median(f(x,y)) = median(g(x-i,y-j) for all i,j around (x,y)

Among them, f(x,y) represents the original image, g(xi,yj) represents the filtered image, and i and j represent the pixel coordinates. In practical applications, the sliding window method is usually used to implement median filtering, and the window size and step size can be adjusted according to actual needs.

The development of image median filtering based on FPGA mainly includes the following steps:

1. Algorithm design: Select an appropriate median filter algorithm according to needs, and optimize the algorithm according to the characteristics of FPGA.

2. Hardware design: Based on the algorithm design, use a hardware description language (such as VHDL or Verilog) to design the hardware structure of the FPGA.

3. Hardware simulation and verification: Use simulation tools to simulate and verify the designed hardware structure to ensure that its correctness and performance meet requirements.

4. Hardware implementation: Download the designed hardware structure to the FPGA and conduct actual testing and debugging.

5. System integration: Integrate the image median filter module implemented in FPGA into the entire image processing system, and conduct system testing and optimization.

         In general, the development of image median filtering based on FPGA requires certain knowledge of hardware design and image processing, as well as familiarity with the FPGA development process. In the actual development process, algorithm optimization and hardware design optimization also need to be carried out according to specific needs to improve the performance and stability of the system.

5. Algorithm complete program engineering

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