Storage System
Hierarchical storage structure - classification
1. Storage location
Internal memory & external storage
2. Access method
- Access by content: associative memory (such as Cache)
- Access by address: random access memory (such as memory)
sequential access memory (such as magnetic tape)
Cache
concept
- In the computer's storage system system, Cache is the fastest access level (if there are registers, the registers are the fastest)
- The basis for using Cache to improve system performance is the principle of program locality: temporal locality and spatial locality
- If h represents the access hit rate of Cache, t1 represents the cycle time of Cache, and t2 represents the cycle time of main memory, taking read operation as an example, the average cycle of the system using "Cache+main memory" is t3, then t3 = h* t1+(1-h)*t2, where (1-h) is also called failure rate
address map
Address mapping is to divide the storage space of the main memory and Cache into several pages (or blocks) of the same size
. 16 pages, 512KB per page
1. Directly connected to the image,
the circuit is simple and the conflict rate is high
2. Fully associative image
Low conflict rate and high circuit complexity
Every page of main memory can be placed in any page of cache
3. Group associative image
The circuit responsibility is compromised, and the conflict rate is compromised
Main Memory - Addressing and Computing
1. Storage unit
Storage unit = maximum address - minimum address +
1 2. Addressing content
- Addressing by word: the storage unit of the memory bank is a word storage unit, that is, the minimum addressing unit is a word
- Addressing by byte: the storage unit of the storage bank is a byte storage unit, that is, the minimum addressing unit is a byte
3. Total capacity = storage unit * addressing content
Total number of pieces = total capacity / capacity of each piece
The example memory is addressed by byte. The memory with addresses from A0000H to CFFFFH has a total of () bytes. If the memory space is composed of a memory chip with a storage capacity of 64K * 8bit, at least () pieces are required
By byte addressing 1B = 8bit
Number of storage units = CFFFFH - A0000H +1 =30000H
Total capacity = 3 16^4 * 8bit = 192KB
Total capacity = Total number of chips per chip capacity
Number of chips = 3