Design 8-bit carbon nanotube CPU based on Verilog and realize software and hardware computer system

This is a project I did during my graduate school - carbon nanotube computer. However, this project has come to an end temporarily, and subsequent research will no longer be based on this, but it has certain reference value.

Background of the project

In 2013, Stanford University developed the world's first carbon nanotube computer system, which consists of 178 carbon nanotube transistors (CNTFET, Carbon-nontube Field-effect-transistor). This is a single-instruction computer system that contains only one SUBNEGinstruction (subtract and branch if negative). This CNTFET computer is an experimental effort and can only perform 1-bit operations. Of course, the monitor and keyboard are also absent.

Today, when Moore's Law is about to expire, silicon-based integrated circuits have almost reached the limit of their technology. At this time, the integrated circuit industry urgently needs a new type of material to break the bottleneck of the industry. The emergence of such a carbon nanotube computer is a milestone. Therefore, the papers related to the research results are also included in Nature.

Project Introduction

Project goal: to realize a relatively complete computer system on which users can run their own programs. Of course, the CPU used in the system is manufactured using carbon nanotube-related processes.

The instruction system and microstructure of the CPU used in this system were designed by me and a PhD student, and physically implemented by another team. In addition, I am responsible for designing and implementing the complete structure of the computer system, including software and hardware co-design and implementation.

the whole frame

As shown in the figure below, the system mainly consists of the following three parts:

The whole system consists of five parts:

  • Carbon Core: A CPU implemented using carbon nanotubes.
  • Coordinator: Implemented by FPGA, it assists Carbon Core CPU to complete instruction and
    data storage, generate required clock, and complete functions such as asynchronous communication with input and output control CPU.
  • External Controller: Use the Raspberry Pi (Raspberry Pi) as the input and output to control the CPU, and
    run the Linux operating system on it.
  • Monitor: Display, the way for users to obtain system information.
  • Keyboard: Keyboard, the way users enter commands.

Carbon Core

Instruction system
The CPU of this system is based on the design of the world's first 8-bit processor Intel 8008, and has been tailored and optimized for the characteristics of carbon nanotube CPU manufacturing technology. The instruction system of the CPU is shown in the table below:

mnemonic instruction encoding command description
MOV C 0000 0000 acc = C
MOV [C] 0000 0001 acc = DRAM[C]
MOVn 0000 0101 DRAM[C = acc
ADD C 0000 1000 acc = acc + C
ADD [C] 0000 1001 acc = acc + DRAM[C]
ADDn [C] 0000 1101 DRAM[C] = acc + DRAM[C]
SUB C 0001 0000 acc = acc - C
SUB [C] 0001 0001 acc = acc - DRAM[C]
SUBn [C] 0001 0101 DRAM[C] = acc - DRAM[C]
RSB C 0001 1000 acc = C - acc
RSB [C] 0001 1001 acc = DRAM[C] - acc
RSBn [C] 0001 1101 DRAM[C] = DRAM[C] - acc
DATASEG C 0010 1000 DATASEG = C
INSTSEG C 0010 1001 INSTSEG = C
JR C 0010 1100 PC = acc, INSTSEG = C
B C 0011 0000 PC = PC + C
BZ C 0011 0001 If acc = 0, PC = PC + C
BNZ C 0011 0010 If acc != 0, PC = PC + C
END 0011 1111 shutdown operation

Microarchitecture
The microarchitecture of this CPU is shown in the figure below. Including arithmetic logic unit ALU, instruction decoder DEC, program counter PC, branch judgment logic and so on. The CPU is controlled by two clocks of the same frequency and different clocks.

Coordinator

The CPU alone cannot run the program, therefore, a peripheral auxiliary circuit needs to be custom-designed for it. The following figure shows the internal implementation of the auxiliary circuit module Coordinator, which mainly includes 7 major components:

  • Clock Generator: The clock generator, the clock source comes from the FPGA clock source, and provides clocks to the Decoder and Carbon Core CPU.
  • Decoder: Assist Carbon Core CPU to decode, address, read and write RAM.
  • Main Controller: transmits the control signal of the external controller, which may inform the Decoder and Carbon Core CPU; in addition, after capturing the END instruction, it will send a program completion signal to the external controller.
  • IRAM Controller: Control Decoder's read operation to IRAM.
  • DRAM Controller: Control Decoder's read and write operations on DRAM.
  • IRAM: A RAM containing 256 double-byte storage units for storing instructions, including an I2C-based instruction sending and receiving protocol inside.
  • DRAM: A RAM containing 256 single-byte storage units for storing data, including an I2C-based data sending and receiving protocol inside.

Raspberry

The project uses the Raspberry Pi as an external controller and is programmed on the Raspberry Pi. At present, only assembly programming can be performed. Of course, the program needs to follow the instruction system of Carbon Core CPU. Use a simple assembler written by us to compile, and the Carbon Core CPU can execute the program you write by controlling the program.

raspberry-host/mainController.cppThe file contains the entry function of the entire system software control program.

Compile
Directly rasberry-hostrun build.shthe script in the directory to compile the control program:

$ ./build.sh

Running
If you want to run the whole system, you need to build the relevant circuit system and use FPGA to implement the hardware design in sparntan6-fpgathe catalog . The project also provides the hardware design of carbon nanotube CPU. Although ordinary users cannot use carbon nanotubes to realize the CPU, they can use FPGA to realize it. Of course, you also need a Raspberry Pi, a monitor, and a keyboard to make the whole system work.

When the system is built, you can run the following command:

$ sudo ./mainController > run.log

Since the operation of the system involves the initialization of the Raspberry Pi GPIO, root authority is required to run the system correctly. In addition, run.logthe file records the relevant information when the system executes the program.

other supplements

level conversion

Since the working voltage of Carbon Core is 2V, and the working voltage of our Raspberry Pi and FPGA is 5V, it is necessary to add a level conversion module when working together. As shown in the figure below, it is the level conversion circuit we designed.

System display

Carbon nanotube CPU

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Origin blog.csdn.net/sheziqiong/article/details/130741237