Program interrupt mode
concept of interruption
I/O Interrupt Generation
CPU and printer partly work in parallel
Interface circuit in program interrupt mode
Configure interrupt request trigger and interrupt mask trigger
Queueer
1. INTR is 0 by default, and if it is not, it is 1. After &, the entire queuing circuit is 1
2. When the i-device sends a request, INTRi=1, negate is 0, and becomes 0 after &, the circuit after INTPi is cleared, only the INTP before i is 1
3. In a series of INTPs showing 1, the last device showing 1 has the highest priority. Because according to our analysis, it sent the request
The priority here refers to: in a certain situation, among several devices that issue interrupt requests, the priority is the highest. Not all devices have the highest priority
The priority here refers to: in a certain situation, several devices issue interrupt requests, and the INTP corresponding to which device is 1 at this time, this device is the device with the highest priority among the interrupt request devices.
Interrupt Vector Address Formator
The basic composition of the program interrupt mode interface circuit
I/O interrupt handling process
The conditions and time for the CPU to respond to interrupts
Interrupt Service Routine Flow
Single interrupt and multiple interrupt
Service program flow of single charge interrupt and multiple interrupt
The time to open the interrupt is different, that is, the setting time of the interrupt mask is different
Schematic diagram of main program and service program preempting CPU
