cpu

The basic hardware system of the computer: arithmetic unit, controller, memory, input device, output device

The cpu is responsible for obtaining program instructions, decoding and executing the instructions (original title)

function of cpu
Controller (to ensure the normal execution of the program and handle abnormal events)	program control
	operation control
calculator (can only calculate)	time control
	data processing

calculator

Arithmetic Logic Unit (ALC)
Accumulation register (AC) (provides data for ALC to perform arithmetic logic and temporarily stores operation results) (original title)
Data Buffer (DR)
Status Condition Register (PSW)

Controller (decision computer to perform automation)

Instruction calculator (IR) (stores opcodes and address codes)
Program Counter (PC) (will point to the next specified address) (Original Title)
Address Calculator (AR)
Instruction Decoder (ID) (decodes instructions)

Instructions include opcodes and address codes

The instruction register is completely transparent to the user (original title)

basic unit of computer

name	unit	abbreviation	conversion
bit (bit)	bit	b
byte	byte	B	1 byte = 8bit
kilobytes	KB	K	1KB=1024b
megabyte	MB	M	1MB=1024KB
gigabytes	GB	G	1GB=1024MB
terabyte	TB	T	1TB=1024GB

The smallest data unit: bit (bit)

The smallest storage unit: byte (btye)

Conversion

Decimal (D) Binary (B), Octal (O), Hexadecimal (H)

_(H) = _ _ _ _（B）= _（O）= _ _ _(D)

FF(H) = 1111 1111（B）= 128+64+32+16+8+4+2+1 = 255

15*16¹+15*16⁰ = 255

756(O) = 1 1110 1110（B）=256+128+64+32+8+4+2 = 494

7*8²+5*8¹+6*8⁰ = 494

base addition and subtraction

A	B	C	D	E	F
10	11	12	13	14	15

(n) base, over n minus n, write the remainder into 1

ABDFE(H) 205(O) 90E(H)

+ 1024 - 7 - F

—————— —————— —————

ACE22 176 8FF

Original code, inverse code, complement code

original code and inverse code

0 means positive sign, 1 means negative sign

[+0] Original = 0 0000000

[-0] original = 1 0000000

The inverse code of a positive number is the same as the original code, and the inverse code of a negative number is the inverse of its absolute value bit by bit

[+0] reverse = 0 0000000

[-0] inverse = 1 1111111

Complement and Shift

The complement of a positive number is the same as its original and complement

The complement of a negative number is equal to adding 1 to the end of its complement

[-3] Original = 1 0000011 [-3] Inverse = 1 1111100 [-3] Complementary = 1 1111101

[+0] complement = [-0] complement = 0 0000000

Code shift: Invert the sign bit on the basis of complement code

[[x] Complement] Complement = [x] Original The complement of the original complement is equal to its original code

range and value

Original code: +127~-127

Inverse code: +127~-127

Complement code: +127~-128

Frame shift: +127~-128 because +0 is the same as -0, so the minimum complement and frame shift is -128 *

floating point number

N=2ᴱ × F E is the order code, F is the mantissa The number of digits before the decimal point is the order code, and the number after the decimal point is the mantissa

Example: 1011.10101 = 2⁴ * 0.101110101

Alignment: The small order is aligned to the large order, and the floating-point number is moved to the right. 10² —> 10⁴ (original title)

Normalizing floating-point numbers is to limit the absolute value of the mantissa to [0.5,1] * (original title)

addressing

Sort by time:

Immediate addressing (operand in instruction)
Register addressing (operands are in registers)
Direct addressing ( operands in memory, addresses in instructions )
register indirect addressing
indirect addressing

Check code (original title)

parity code

Only an odd number of errors can be verified, no error correction, only verification

Yard distance is 2

Hamming Code

Checking with Multiple Sets of Parity

Can detect and correct errors *

If there are n data bits and k bits for parity, then 2ᴷ - 1>=n+k needs to be satisfied

Cyclic Redundancy Check Code

Can detect errors, cannot correct errors

r check bits after k data bits

Modulo 2 operation

Yard distance is 2

RISC and CISC (original title)

reduce streamlined	complex complex
RISC Reduced Instructions	CISC Complex Instructions
fixed length	length change
less addressing mode	Various addressing methods
Implement hardwired control of decoding	micro program control technology
large number of registers	generally
Support pipeline	Does not support pipelining
Less types of instructions	Many instructions

Pipeline formula

First instruction execution time + (n-1) × (maximum time) = pipeline time

Speedup = No Pipelining / Pipeline Time

Operating cycle: the longest time period of all time periods

Throughput: the reciprocal of the longest period of time

Throughput rate of n instructions: n/pipeline

Utilization can be improved by increasing the rate (original question)

memory

Flash memory, referred to as flash memory (similar to a U disk) in units of blocks

There are 2 classification methods for storage:

1. Memory accessed by address and memory accessed by content

2. According to the addressing mode: random access memory, sequential memory, direct memory

Associative memory is a memory accessed by content

Virtual memory (main memory + auxiliary memory)

The main memory of the computer system is mainly composed of DRAM , (Dynamic Random Access Memory, a storage device that maintains data through periodic refresh)

Cache is mainly composed of SRAM, (static random access memory, static means that data can be kept constantly as long as it is powered on)

Electrically erasable memory is mainly composed of EEPROM

DRAM periodic properties to maintain data storage (original title)

Cache (cache) is used to store the currently most active programs and data

Located between the CPU and the main memory, the speed is 5-10 times faster than the main memory

transparent to programmers

Used to store part of the copy information cache capacity is small

The hit rate of the cache is related to the cache capacity

The larger the cache capacity, the higher the hit rate, the higher the cache cost, and the more time-consuming

address map in cache

Direct image: The corresponding relationship between the main memory block and the cache block is fixed, and the conflict is large
Fully associative image: any block of the main memory can be transferred to any fast space in the cache memory, less conflicts
Group associative image: fewer conflicts

The mapping between cache and storage address is done automatically by hardware

The interrupt vector provides the entry address of the interrupt service routine

Interrupt response time: from the time an interrupt request is issued to entering the interrupt service routine

The purpose of saving the scene: to return to continue the original program

Input and output (I/O) control method

Program query method

The cpu and I/O can only work serially, the cpu needs to poll and check all the time, the production period is in a busy state, and the cpu utilization rate is low
Only read and write one word at a time
Put the number into memory by the cpu

interrupt driven

The I/O device actively reports the completion of the I/O operation through an interrupt signal
cpu and I/O (peripherals) can work in parallel
Increased cpu utilization, only one word can be read and written at a time
Put the number into memory by the cpu

Direct Memory Access Mode (DMA)

cpu and I/O (peripherals) can work in parallel
CPU intervention is only required at the beginning and end of the transfer block
Put data directly into memory (main memory) by peripherals
The unit of one-time read and write is block

Classification of the bus

The bus in the microcomputer is divided into data bus, address bus and control bus (original title)

Abbreviation: Digital Land Control

The PCI bus is an internal bus, which adopts parallel transmission mode

The SCSI bus is a parallel external bus

Brief note: They are all parallel. PCs are generally used at home, so the internal bus, and another scsi is outside, so it is an external bus.

Bus multiplexing can reduce the number of signal lines in the bus (original title)

Encryption Technology (required)

Symmetric encryption:

Only one key, key distribution has disadvantages

Encryption and decryption speed is fast, suitable for encrypting a large amount of plaintext

Non-heap encryption:

There are two keys, encrypted with the public key --> decrypted with the private key, encrypted with the private key --> decrypted with the public key

You can't use one to push the other, and the speed of encryption and decryption is slow

Encrypt it with the public key of whoever it is sent to

digital signature

Protection against counterfeiting and denial

Summary

prevent tampering

CA: Authority

Verify the digital certificate with the CA's public key

The private key is used for: decryption and signing

Public keys are used for: encryption and authentication

Motto: public inspection, private solution

Symmetric encryption algorithm

DES、3DES、RC-5、IDEA、AES、RC4

Asymmetric encryption algorithm

RSA、ECC、DSA

digest algorithm

MD5

SHA-1 Secure Hash

series system

R=R1R2R3...RN

parallel system

R=1-（1-R1)(1-R2)...(1-RN)

The mantissa of the instruction register depends on the instruction word length

The purpose of using a hierarchical storage system for computers is to solve the contradiction between storage capacity cost and speed (original title)

The fastest in the computer for the CPU is the general-purpose register

Active attacks: replay, IP address spoofing, denial of service

Passive attack: traffic analysis, session interception

low level language vs high level language

interpreter:

The interpreter and the source program must participate in the running process of the program

translater:

Both the source program and the compiled program no longer participate in the running process of the target program

Translate (compile) the source program into an independently stored object program

Shorthand: Compile NB some, the generated target program does not participate in the operation

Explain the rubbish a little bit, instead of generating the target program, you need to participate

Three basic control structures of programs: sequence, selection, loop (repeat)

There must be a data type in the program:

Facilitate reasonable allocation of storage units for data
Facilitates checking of parameter object expressions
It is convenient to specify the value range

The basic components of programming language include: data, operation, control and transmission

Short-circuit operation: (required)

True||? => true
Fake&& ? => false

Call by value: (required)

Only pass the value, do not change the original value

Call by reference: passing the address will change the original value, and the parameter cannot be a constant or an expression (original question)

Compilation method: lexical analysis, syntax analysis, semantic analysis, (intermediate code generation, code optimization, object code generation)

Interpretation methods: lexical analysis, grammatical analysis, semantic analysis

Symbol table: continuously collect, record and use the types and characteristics of related symbols of the source program

The main role of the semantic analysis phase is to perform type analysis and inspection (original title)

The grammatical analysis phase can find all grammatical errors in the program (original title)

Semantic analysis cannot find all semantic errors in the program (original title)

Semantic analysis can find static grammatical errors, but not dynamic semantic errors. Dynamic semantic errors can only be found when it is running (Original Title)

The allocation of registers is in the stage of object code generation (required)

Lexical Analysis: Recognizing Characters (Looking Up Words) (Required)

Parsing: Examining Deconstruction (Subject-Verb-Object) (Compulsory)

Semantic analysis: check whether the type matches (expression type) as: int a = 'qqq' (error) (required)

Common intermediate codes: suffix, three-address code, ternary, quaternary, and tree

The intermediate code has nothing to do with the specific machine, and different high-level languages can be translated into the same intermediate code, and the intermediate code can be cross-platform (original title)

Because it has nothing to do with the specific machine, the use of intermediate code is conducive to machine-independent optimization and improve the portability of compilation.

finite automata

Context-Free Grammar: It is widely used to express the grammatical rules of various programming languages.

suffix priority

（）
× /
+ -

When the priority is the same, proceed from right to left

Infix: a ? b

Suffix: a b ?

When the syntax tree needs to be suffixed, it is sufficient to perform postorder traversal on the syntax tree.

time complexity:

O(1) < O(log₂n) < O(n) < O(nlog₂n) < O(n²) < O(n³) < O(2ⁿ) < O(n!) < O(nⁿ)

No special code	O(1)
while loop	O(log₂n)
for loop	O(n)
for loop + while loop	O(nlog₂n)
double for loop	O(n²)
Three for loops	O(n³)

Space complexity:

O(1) < O(n) < O(n²)

constant < one-dimensional array < two-dimensional array

Progressive symbols (required + original question)

O is denoted as an asymptotic upper bound >=

10n²+4n+2=O(n²)
10n²+4n+2=O(n³)

Ω is recorded as the asymptotic lower bound <=

10n²+4n+2=Ω(n²)
10n²+4n+2=Ω(n)

Θ is denoted as an asymptotically compact bound O = Ω = Θ

10n²+4n+2=Θ(n²)

$T(n)= aT\frac{n}{b}+f(n)$ (Compulsory test + original question)

if $\varepsilon >0,f(n)=O(n^{log_{b}^{a-\varepsilon }})$ then $T(n)=\circleddash (n^{log_{b}^{a}})$
if $f(n)=\circleddash (n^{log_{b}^{a}}lg^{k}n)$ then $T(n)=\circleddash (n^{log_{b}^{a}}lg^{(k+1)}n)$

	sequence table	linear table	average time complexity
look up	O(1)	O(n)
insert	O(n)	O(n)
delete	O(n)	O(n)

There is no need to traverse the linked list for stacking and popping

Enqueue and dequeue do not need to traverse the linked list

The advantage of circular queues: neither enqueue nor dequeue operations need to move other elements in the queue

n is the main string, m is the pattern string (matching string)

Number of string comparisons:

Best: m times
Worst (n-m+1) * m times
Average (n+m) / 2 times

KMP pattern matching algorithm, find the next function value

Rule: Satisfy prefix = suffix

Example: abaabaca

From left to right!

current character	match string	1	2	3	4	5	6	This next value	next
a baba								0	0
a b door	a							0+1=1	01
father a father	ab	Before a != After b						0+1=1	011
Aba a baga	aba	front a=back a	front ab != back ba					1+1=2	0112
aba b aca	Dad	front a=back a	Front ab != Back aa	Front aba != Back baa				1+1=2	01122
father a ca	father	Before a != After b	Front ab=back ab	Front aba != Back aab	Front abaa != Back baab			2+1=3	011223
father c a	who cried	front a=back a	front ab != back ba	Front aba=back aba	Before abaa!=After aaba	Front abaab != Back baaba		3+1=4	0112234
a _	abaaba	Before a != After c	Front ab != Back ac	Front aba != Back bac	前abaa!=后abac	前abaab!=后aabac	前abaaba!=后baabac	0+1=1	01122341

二维数组转为一维数组（必考）

二维：N 行 M 列，数组首地址：loc

按行优先：（按行存储）

当二维数组（0，0）开头时：

$a_{i,j}=loc+(M\ast i+j )$

当二维数组（1，1）开头时：

$a_{i,j}=loc+[M\ast (i-1)+(j-1)]$

按列优先：（按列存储）

当二维数组（0，0）开头时：

$a_{i,j}=loc+(j\ast M)+i$

当二维数组（1，1）开头时：

$a_{i,j}=loc + [(j-1)\ast N]+(i-1)$

对称矩阵转为一维数组

按行存储下标从( $A_{0,0}$ )开始

当 i>=j 时， $A_{i,j}=\frac{i(i+1)}{2}+j+1$

当 i<=j 时， $A_{i,j}=\frac{j(j+1)}{2}+i+1$

对称矩阵按行存储下标从( $A_{1,1}$ )开始

当 i>=j 时， $A_{i,j}=\frac{(i-1)i}{2}+j$

当 i<=j 时， $A_{i,j}=\frac{(j-1)j}{2}+i$

三对角矩阵按行存储下标( $A_{0,0}$ )开始

$A_{i,j}=2i+j+1$

三对角矩阵按行存储下标( $A_{1,1}$ )开始

$A_{i,j}=2i+j-2$

节点的子树个数称为度（度就是直线的个数）

树的度：树里所有度中的最大值

树中的节点总数 = 树中所有结点度数之和 + 1

度为 m 的树中第 i 层上至多有 $m^{i-1}$ 个结点（i>=1）

对于任何一棵二叉树都有： $n_{0}=n_{2}+1$

高度为 h 的二叉树最多有 $2^{h}-1$ 个结点

二叉树第 i 层上最多有 $2^{i-1}$ 个结点

具有 n 个结点的完全二叉树的高度为 $\left \lfloor log_{2}^{n} \right \rfloor+1$

满二叉树：每层都是满的

完全二叉树：从上往下，从左到右排序的。

非完全二叉树：

二叉树的形态有 $\frac{C_{2n}^{n}}{n+1}$ 种，n为结点数。

$C_{6}^{3}=\frac{6\times 5\times4}{3\times2\times1}=20$

二叉树包含k个结点时，其二叉链表结点中必有k+1个空的孩子指针

构造二叉树必须要中序遍历！

平衡二叉树：二叉树中的任意一个结点的左右子树高度差的绝对值不超过1.

最优二叉树（哈夫曼树）：带权路径最短的树

最优二叉树不唯一

构造哈夫曼树

从前往后找刘昂个权值最小的数
小左大右：小的放左边大的放右边
加入末尾：构造出新的结点数再加到队列尾端
权值相同，从前往后：当遇到权值相同的结点，依照队列中的先后顺序
用时再调

哈夫曼编码：左0右1

图

所有顶点的度数为2e，e为边数，不论有向图还是无向图

有向图：i -> j $<v_{i},v_{j}>$

无向图：i -> j $(v_{i},v_{j})$

完全图：每个顶点之间都有边，共有 $\frac{n(n-1)}{2}$ 条边，有向完全图为 n(n-1) 条边

连通图：在无向图中，任意两点之间有路径

最少有 n-1 条边，最多有 $\frac{n(n-1)}{2}$ 条边

强连通图：在有向图中，任意两点之间都有路径

最少有 n 条边，最多有：n(n-1) 条边

邻接矩阵表示法（适合边数多的）

第 i 行中不为 0 的个数表示 i 的出度数

第 j 列中不为 0 的个数表示 j 的入度数

无向图：矩阵中非 0 元素个数为 2e ，e为边数

有向图：矩阵中非 0 元素个数为 e ，e为边数

邻接链表表示法（适合边数少的）

出度数为该点后的结点数

入度数：寻找指向该结点数

遍历方式

深度优先遍历：（类似栈，递归思想）

优先访问邻接顶点且有下个顶点

用邻接矩阵： $O(n^{^{2}})$

用邻接表： $O(n+e)$

广度优先遍历：（类似队列）

遍历结果：125634

一层一层访问

用邻接矩阵： $O(n^{^{2}})$

用邻接表： $O(n+e)$

深度优先遍历与广度优先遍历的时间复杂度相同

顺序查找适用于顺序存储方式和链式存储方式

查找分为静态查找和动态查找

静态查找：

顺序查找
折半查找
分块查找

动态查找

二叉查找树
平衡二叉树
哈希表

折半查找知识和顺序存储，有序

最多比较 $\left \lfloor log_{2}^{n} \right \rfloor+1$ 次

平均比较 $\frac{n+1}{2}$ 次

哈希表：构造哈希函数时，应尽量使关键字的所有组成部分都能起作用

可以删除、可以插入、可以查找

当k1=k2，且H（k1）≠H(k2),称为同义词

小顶堆与大顶堆

小顶堆

满足 $k_{i}\leqslant k_{2i}$ 且 $k_{i}\leqslant k_{2i+1}$

as：15，25，21，33，73，65，53

大顶堆

满足 $k_{i}\geq k_{2i}$ 且 $k_{i}\geq k_{2i+1}$

as：73，65，25，33，53，15，21

建立大顶堆，从上往下，把大的选为父节点

排序算法

算法时间空间复杂度
	平均时间复杂度	最坏时间复杂度	最好时间复杂度	空间复杂度	稳定性
直接插入	$O(n^{2})$	$O(n^{2})$	$O(n)$	$O(1)$	√
希尔排序		$O(n^{2})$	$O(n)$	$O(1)$	×
简单选择排序	$O(n^{2})$	$O(n^{2})$	$O(n^{2})$	$O(1)$	×
堆排序	$O(nlog_{2}^{n})$	$O(nlog_{2}^{n})$	$O(nlog_{2}^{n})$	$O(1)$	×
冒泡排序	$O(n^{2})$	$O(n^{2})$	$O(n)$	$O(1)$	√
快速排序	$O(nlog_{2}^{n})$	$O(n^{2})$	$O(nlog_{2}^{n})$	$O(1)$	×
归并排序	$O(nlog_{2}^{n})$	$O(nlog_{2}^{n})$	$O(nlog_{2}^{n})$	$O(n)$	√

红色边框则代表经常会考，记住这三个就好了。

算法是否稳定：取决于在排序过程中是否存在乱序的情况，整个算法过程中，一直是从小到大或从大到小，则稳定，反之，不稳定！

直接插入：适合基本有序

冒泡排序：每排序一次确定一个位置

快速排序：分治的思想、有序的序列是最坏的情况、每排序一次确定一个位置

数据库

数据库系统同城采用三级模式：外模式（视图）+模式（基本表）+内模式（存储文件）

逻辑独立性：外模式（视图）

物理独立性：内模式（存储文件）

R
A	B
a	d
b	a
c	c

S
A	B
d	a
b	a
d	c

RUS
A	B
a	d
b	a
c	c
d	a
d	c

R-S
A	B
a	d
c	c

R∩S

A	B
b	a

自然连接时去重的列的等值连接

R
A	B	C
1	2	3
4	5	6

S
A	B	E
1	2	6
4	4	4

R×S
R.A	R.B	R.C	S.A	S.B	S.C
1	2	3	1	2	6
1	2	3	4	4	4
4	5	6	1	2	6
4	5	6	4	4	4

R∞S
R.A	R.B	R.C	S.E
1	2	3	6

R
A	B	C

S
B	C	D

$\pi _{A,B,C}(R)\Leftrightarrow select A,B,C from R$

$\pi _{A,B,C}( \sigma_{B\geqslant 5}(R) )\Leftrightarrow select A,B,C from R where B \geqslant '5'$

$R \Join S \Leftrightarrow selectR.A,R.B,R.C,S.D from R,S where R.B=S.B and R.C=S.C$

可以通过主键唯一标识一个元组

数据库权限给某人，且允许该人将权限授予他人，用 with grant option

视图中表示对update，insert， delete 操作时，保证操作满足视图定义用 with check option

视图是一个虚拟表，查询时可以从一个或者多个基本表或视图中导出。（原题）

索引《=》内模式

候选码

包含在候选码中的元素成为主属性，否则成为非主属性

as: R(U,F) U={A,B,C,D,E,H} F={ A->B , A->C , C->D ,AE-> H }

可以推导出 AE -> ABCDEH，所以AE是候选码，所以 A, E是主属性/主键/关键字，B,C,D,H 是非主属性。

as: R(U,F) U={A,B,C,D,E,H} F={ A->B , A->H , C->E ,B-> DH }

所以有关键字A,C，候选码AC

第一范式、第二范式与第三范式

部分函数依赖：非主属性可以由候选码中的一部分主属性推导出来，则称存在部分函数依赖

as：A->B,A->C,D->E,AD->F,那么AD为候选码，A为主属性、D为主属性，且存在非主属性B、C、E可以由候选码AD的一部分，A或D推出，所以存在部分函数依赖

完全函数依赖：非主属性只能通过候选码中的所有主属性一起推导出来，则称存在完全函数依赖

as：AB->C,那么AB为候选码，AB为主属性，且非主属性C只能由候选码AB推出，所以称为完全函数依赖

1NF 第一范式

每个属性都不可再分，但可能存在数据冗余和更新异常等问题，因为其中可能存在部分函数依赖

1NF特点：R中属性不可再分

2NF 第二范式

R是第一范式并且每个非主属性都完全函数依赖于候选码，但其中可能存在传递依赖

2NF特点：不存在非主属性对候选码的部分函数依赖

1NF——>2NF 消除部分函数依赖，使得所有非主属性都完全依赖于候选码（所有非主属性只能拿通过候选码推出）

例题：F = {学号-> 姓名，学号->学院，学号->院长，学院->院长，课程号->课程名，（学号，课程号）->成绩}

U = {学号，姓名，学院，院长，课程号，课程名，成绩}

可以看出其中存在：

部分函数依赖：学号-> 姓名，学号->学院，学院->院长，学号->院长，课程号->课程名
完全函数依赖：（学号，课程号）->成绩

所以存在：（学号+课程号）为候选码，学号、课程号为主属性。

候选码：（学号，课程号）主属性：学号、课程号

将学号记作k1，课程号记作k2进行分解。

F1={ 学号-> 姓名，学号->学院，学号->院长，学院->院长}

U1={ 学号，姓名，学院，院长}

完全函数依赖：学号-> 姓名，学号->学院，学号->院长，学院->院长

主属性为：学号

F2={课程号->课程名}

U2={课程号，课程名}

完全函数依赖：课程号->课程名

主属性为：课程号

F3={ （学号，课程号）->成绩}

U3={课程号，课程名，成绩}

完全函数依赖：（学号，课程号）->成绩

主属性为：（学号，课程号）

3NF:R是第三范式

且每个非主属性都非传递依赖函数依赖于候选码，（不存在非主属性对候选码的传递依赖、部分函数依赖，可能存在主属性对候选码的部分函数依赖和传递依赖）

F4={学号->姓名，学号->学院}

U3={学号，姓名，学院}

完全函数依赖：学号->姓名，学号->学院

主属性：学号

x->y , y->z =》 x->z,将z属性单独提出，生成一个新的函数关系

学号->学院，学院->院长=>学号->院长

F5={学院->院长}

完全函数依赖：学院->院长

U5={学院，院长}

有损联接/无损联接与函数依赖判断

R(A1，A2，A3，A4)， F={ A1A3->A2 , A2->A3 }

R分解为ρ={（A1，A2），（A1，A3）}，判断是有损联接还是无损联接？

因为 $(A1,A2)\bowtie (A1,A3) = (A1,A2,A3)\neq R(A1,A2,A3,A4)$ ，所以是有损联接

对于分解后的ρ，其中（A1，A2）不在F中，（A1，A3）在F： A1A3->A2 中，但（A1，A3）中没有A2，因此A1A3≠>A2，所以不保持函数依赖

as：R(U,F) U={A,B,C,D,E,G} F={ A->B ，A->C，C->D，AE->G }

分解为_____两个子模式，分解后的关系仍保持依赖。

R1{A，B，C，D} （ A->B ，A->C，C->D）
R2{A，E，G} （AE->G）

软件工程

排它锁与事务

加了排它锁后，其他事务不能再加锁，该事务可对它读和修改

加了共享锁后，其他事务只能再加共享锁，只能读，不能修改

模块划分

在划分模块时，一个模块的作用范围应该在其控制范围之内。若发现其作用范围不在其控制范围内，则可以通过

将判定所在模块合并到父模块中，使判定处于较高层次
将判定上移到层级较高的位置
将受判定影响的模块下移到控制范围内

内聚模式

内聚类型	描述
功能内聚	完成一个单一功能，各个部分协同工作，缺一不可
顺序内聚	处理元素相关，而且必须顺序执行
通信内聚	所有处理元素集中在一个数据结构的区域上
过程内聚	处理元素相关，而且必须按特定的次序执行
时间内聚	所包含的任务必须在同一时间间隔内执行
逻辑内聚	完成逻辑上相关的一组任务
巧合内聚	完成一组没有关系或松散关系的任务

开发模型

模型名称	适用情况
瀑布模型	适用于需求明确（相关领域经验、替换原有系统、功能有较清晰的定义、）
增量模型	拥有瀑布模型的所有优点，可快速构造可运行产品
原型模型	适用于需求不明确，不适用于大规模系统
螺旋模型	适用于风险较大，规模较大的系统
喷泉模型	适用于面向对象开发的系统，各个开发阶段没有明显的界限

计算机安全

防火墙

计算机病毒

网络攻击

其他网络安全

主动攻击：重放、IP地址欺骗、拒绝服务

被动攻击：流量分析

数据库容灾属于：系统安全和应用安全

网络安全体系：物理线路安全、网络安全、系统安全、应用安全

SSL：传输层，用于实现web安全通信，https是基于SSL

SSH：应用层和传输层，用于终端设备与远程站点之间建立链接，安全远程登录

MIME：电子邮件类型扩展，与安全电子邮箱无关

产权保护

著作权：作者对其创作的作品享有人身权和财产权

人身权：发表权、署名权、修改权、保护作品完整权

只有发表权有时间限制是终生和死后50年，其他的永久有效

软件著作权产生时间:自从作品完成创作之日起

软件著作权的客体不包括：软件开发思想

如果是植物软件作品，那开发者只有署名权

只要考著作权归公司还是个人的不用想都是归公司

对于专利权，20年有效期，谁先谁获得，当天的共同协商

商标权可以延长（10年续加）

同时申请商标，进行协商，协商无效抓阄/抽签决定

计算机网络

物理层：中继器、集线器

数据链路层：网桥、交换机

网络层：路由器

应用层：网关

端口表
POP3(110)		NFS
FTP(20/21)	HTTP(80)		DHCP(67)	TFTP(69)
Telnet	SMTP(25)		SNMP(161)	DNS(53)
TCP			UDP
IP	ICMP	IGMP	ARP	RARP

应用层	文件传输协议 FTP	远程登录协议 Telnet	电子邮件 SMTP	网络文件服务 NFS	网络管理 SNMP
表示层
会话层
传输层	TCP			UDP
网络层	IP	ICMP	ARP	RARP
数据链路层	IEEE802,FDDI			PPP/SLIP
物理层

MIME：邮件附件

SMTP：发邮件

POP3：收邮件

DNS域名查询顺序：本地host文件 =》本地DNS缓存 =》本地DNS服务器 =》根域名服务器

主域名查询顺序：本地缓存 =》本地host文件 =》本地数据库 =》转发域名服务器

IP:222.125.80.128/26 包含了___个可用主机地址，其中地址最小是_____，最大是_____。

32-26 = 6 2⁶-2 =62
最小地址：222.125.80.129
最大地址：222.125.80.190

IPV6的地址空间是IPV4的____倍。

$IPV6=2^{128}$
$IPV4=2^{32}$
$\frac{2^{128}}{2^{32}}=2^{96}$

先ping127.0.0.1,目的是为了测试网络的的连通性。

主机路由子网掩码：255.255.255.255

下午题

数据流图

实体与实体之间不能有数据流

判断加工是否正确

父图子图平衡：父图有的子图也要有对应的连线
加工数据流有入有出：有入没出：黑洞，有出没有入：白洞：没有入没有出：灰洞
文章寻找数据守恒：文章描述中寻找关键数据流

几种数据关系

包含关系 A包含B A是基本用例执行基本用例必须执行被包含用例

扩展关系 A扩展于B A是扩展用例 B是基本用例，A是B的特殊

泛化关系 A泛化出B,C A是父类，B,C是子类，任选其一

用于最后一题java程序设计代码填空

如果子类是继承（extends）父类，那么分类是抽象类（abstract）

如果子类是实现类（implements）父类，那么父类是接口（interface）

To inherit abstraction, you need to implement all the methods in the abstraction

If a class implements an interface, it must implement all the methods in the interface

Static methods can be called directly through the class name. method name ()

Statistics of occurrences of various design patterns

schema name	The number of occurrences	time
bridge mode	3 times	09 first half	13 second half	17 second half
combination mode	4 times	11 first half	21 first half	2nd half of 2009	10 second half
strategy pattern	3 times	10 first half	19 first half	15 first half
Observer pattern	3 times	14 first half	16 first half	2nd half of 19
decorator pattern	2 times	12 first half	16 second half
state mode	2 times	11 second half	18 second half
generate mode	2 times	17 first half	18 first half

Software Designer Exam Preparation Documents (Updated)

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