IIC bus
General serial data communication has clock and data points, asynchronous and synchronous.
There are single-wire, double-wire and three-wire, etc.
I2C must be 2-wire (not counting ground wire). The
I2C protocol is indeed very scientific, It is better than SPI of 3/4 lines, of course, the communication rate of multiple lines is relatively faster.
The principle of I2C is:
when SCL=1 (high level), SDA must not fool!!!
Otherwise, SDA will jump down." The "penalty" is "start signal S", and if SDA jumps up, the "penalty" is "stop signal P".
When SCL=0 (low level), SDA is just fooling around!!! (don't fool too much until SCL jumps high)
After each byte, the other party should send back an acknowledgment signal ACK as a sign that the other party is online. The
non-acknowledgement signal is generally after the last byte of all bytes. Generally, it must be signed by both parties.
SCL must be sent by the host, otherwise The world is in chaos.
The first byte is the "chip select signal", that is, the 7-bit slave address plus 1-bit direction (read and write) control.
The slave receives (hears) its own address to send a response signal (must respond!!! ) indicates that it is online.
The slaves of other addresses are not allowed to fool!!! (Of course, group calls can be fooled but only listen and not speak)
Read and write are defined from the standpoint of the host.
"Read" means that the host receives data from the slave , "Write" is the master sending data to the slave. The
repeat bit is mainly used for the master's conversion "signal" from the sending mode to the receiving mode. Since there are only 2 lines,
the transceiver conversion must be more complicated than SPI, because SPI can use different edges to send and receive data, but I2C cannot.
In the hardware I2C module,In particular, each stage such as MCU/ARM/DSP will get an accurate status code,
According to this status code, it is easy to know what status and error information it is in. The
7-bit I2C bus can be connected to 127 I2C devices with different addresses, and the "device" No. 0 is used as the group call address. The
10-bit I2C bus can be connected to more There are many 10-bit I2C devices.
In short, as long as you master the I2C fudge, it is generally easy to control... The first byte (slave address) consists of a 7-bit address and a R/W read and write bit. A byte is a device address.
First of all, you need to know: the device address of the common IIC interface device is composed of the type, model and addressing code, a total of 7 bits.
For example, the format is as follows:
D7 D6 D5 D4 D3 D2 D1 D0
1- The device type is determined by: D7-D4, a total of 4 bits. This type is fixed when it is produced by the semiconductor company, which means that these 4 bits are fixed.
2-User-defined address code: D3-D1 has a total of 3 digits. This is set by the user. The usual practice, such as EEPROM, is determined by the combined level of the 3 pins of the external IC (using common names such as A0, A1, A2). This is also the addressing code.
So the reason why the same type of IC on the same IIC bus can only hang up to 8 chips of the same type.
3- The lowest bit is the R/W bit. I don't need to say more about this one.
In modern electronic systems, there are numerous ICs that need to communicate with each other and with the outside world. In order to provide hardware efficiency and simplify circuit design, PHILIPS developed a simple bidirectional two-wire serial bus I2C for internal IC control. The I2C bus supports any IC manufacturing process, and PHILIPS and others offer a wide variety of I2C-compatible chips. As a patented control bus, I2C has become a worldwide industry standard.
When the I2C bus is transmitting data, the data on the data line must remain stable during the period when the clock signal is at a high level. Changes are allowed.
Start and stop signals : During the period when the SCL line is at a high level, the change of the SDA line from a high level to a low level indicates the start signal; when the SCL line is at a high level, the SDA line changes from a low level to a high level. Changes indicate termination signals.
data transfer format
(1) Byte transmission and response
Each byte must be guaranteed to be 8 bits long. When data is transmitted, the most significant bit (MSB) is transmitted first, and each transmitted byte must be followed by a response bit (that is, a frame has a total of 9 bits). If the response signal from the slave is not received within a period of time, it is automatically considered that the slave has received the data correctly.
The chip address of AT24C02 is as shown in the figure below. 1010 is fixed. A0, A1, and A2 correspond to the 1, 2, and 3 leads of the chip. They are the address selection lines in the current circuit. Three lines can select 8 chips to be connected in the circuit at the same time. , when you want to communicate with which chip, you can establish a connection with the chip by sending the corresponding address. The three address lines on the TX-1B experiment board are all 0. The last bit of R/W is to tell the slave whether the next byte of data is to be read or written, 0 is for writing, and 1 is for reading.
Any address read data format
void init() //initialization
{
SCL=1;
delay();
SDA=1;
delay();
}
void start() //start signal
{
SDA=1;
delay();
SCL=1;
delay();
SDA=0;
delay();
}
void stop() //stop signal
{
SDA=0;
delay();
SCL=1;
delay();
SDA=1;
delay();
}
void responses() //response signal
{
uchar i=0;SCL=1;delay();
while((SDA==1)&&(i<255))
i++;
SCL=0;
delay();
}
void writebyte(uchar date)// write a byte
{
uchar i,temp;
temp=date;
for(i=0;i<8;i++)
{
temp=temp<<1;
SCL=0;
delay();
SDA=CY;//Reproduced, there is a problem with the original code, it is estimated that this place should be extracted from the highest bit of temp
delay();
SCL=1;
delay();
}
SCL=0;
delay();
SDA=1;
delay();
}
Any address write data format
uchar readbyte ()
// read a byte
{
uchar i,j,k;
SCL=0;
delay();
SDA=1;
for(i=0;i<8;i++)
{
SCL=1;
delay();
if(SDA==1)
j=1;
else
j=0;
k=(k<<1)|j;
SCL=0;
delay();
}
delay();
return k;
}
Void write_add(uchar address,
uchar info)
//Write a byte of data to the specified address
{
start();
writebyte(0xa0);
response();
writebyte(address);
response();
writebyte(info);
response();
stop();
}
uchar read_add(uchar address)
//Read one byte of data at the specified address
{
uchar dd;
start();
writebyte(0xa0);
response();
writebyte(address);
response();
start();
writebyte(0xa1);
response();
dd=readbyte();
stop();
return dd;
}