JZ2440 Clock

Hardware power-on select clock source:

Clock generation route:

Register settings:

void clock_init()

{

         LOCKTIME = 0xFFFFFFFF;

         //CLKDIVN,FCLK= 400MHz,HCLK = FCLK / 4 = 100MHz,PCLK = HCLK / 2 = 50MHz

         CLKDIVN  = 0x5;

         //MPLLCON,Mpll= (2 * m * Fin) / (p * 2^S),m = (MDIV + 8) = 92 + 8 = 100,

        //p = (PDIV +2) = 1 + 2 = 3, s = SDIV = 1

         //Mpll= (2 * 100 * 12MHz) / (3 * 2^1) = 400MHz

         MPLLCON  = ((92 << 12) | (1 << 4) | (1<< 0));

}